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| datasheet ? stv82x6 multistandard tv audio processor and digital sound demodulator february 2005 1/97 rev. 3 this device incorporates the srs (sound retrieval system) under licence from srs labs, inc. key features nicam, am, fm mono and fm 2 carrier stereo demodulators for all sound carriers between 4.5 and 7 mhz mono input provided for optimum am demodulation performances demodulation controlled by automatic standard recognition system sound if agc with wide range overmodulation and carrier offset recovery smart volume control 5-band equalizer & bass/treble control automatic loudness control loudspeaker and headphone outputs with volume/balance controls and beeper subwoofer output with volume control and programmable bandwidth spatial sound effects (st widesurround and pseudo-stereo) srs ? 3d surround 3-to-2 analog stereo audio i/os (scart compatible) with audio matrix low-noise audio mutes and switches i2s output to interface with dolby ? pro logic ? decoder i2c bus-controlled single and standard 27 mhz crystal oscillator power supplies: 3.3 v digital, 5 v or 8 v analog embedded 3.3 v regulators packages: sdip56 or tqfp80 audio agc audio a/d a/d sda scl sif ai1l ai1r lsl lsr sw matrix ai2l ai2r ai3l ai3r input stereo monoin multi-standard demodulator digital audio matrix analog source preprocessing fm, am, a2 and nicam loudspeaker audio processing smart volume control, st widesurround, 5-band equalizer and loudness, headphone audio processing smart volume control, beeper and subwoofer output bass/treble and beeper i2s interface audio stereo d/a audio stereo d/a audio stereo d/a vol./ low noise audio mute 1v rms hpl hpr low noise audio mute 1v rms sck sdo ws i2c interface gain audio matrix output analog low noise audio mute low noise audio mute 2v rms 2v rms ao1l ao1r ao2l ao2r irq st bus0 bus1 hpd 0.5v rms 2v rms 2v rms 2v rms single crystal clock generation audio matrixing audio processing demodulation xti xto power supply management dc regulators, standby mode i2c bus expander input scarts sound if output scarts headphone subwoofer loudspeaker headphone detection mono in stereo interrupt stv82x6 digital stereo request flag stereo flag bal. vol./ bal. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s)
stv82x6 2/97 table of contents chapter 1 general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.1 overview ................................................................................................................... ........... 5 1.2 typical applications ................................................................................................... ...... 6 1.3 i/o pin description ........................................................................................................ ..... 10 chapter 2 demodulator block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 2.1 digital demodulator ........................................................................................................ .... 12 2.2 system clock ............................................................................................................... ...... 16 chapter 3 audio processor block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 3.1 main features .............................................................................................................. ...... 17 3.2 smart volume control (svc) ............................................................................................. 18 3.3 st widesurround ............................................................................................................ ... 19 3.4 5-band audio equalizer ..................................................................................................... 19 3.5 bass/treble control ........................................................................................................ ... 19 3.6 volume/balance control .................................................................................................... 2 0 3.7 automatic loudness control .............................................................................................. 22 3.8 subwoofer control .......................................................................................................... ... 22 3.9 beeper ..................................................................................................................... ........... 22 3.10 srs? 3d surround (stv8226/36 only) ............................................................................ 23 chapter 4 audio matrices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 5 4.1 input audio matrix ......................................................................................................... ..... 26 4.2 output audio matrix ........................................................................................................ ... 26 chapter 5 additional controls and flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 5.1 interrupt request .......................................................................................................... ..... 27 5.2 i2c bus expander ........................................................................................................... .... 27 5.3 stereo flag ................................................................................................................ ......... 27 5.4 headphone detection ........................................................................................................ 27 chapter 6 i2s interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 3/97 stv82x6 chapter 7 power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 7.1 supply voltages ............................................................................................................ ..... 29 7.2 standby mode ............................................................................................................... ..... 30 chapter 8 i2c bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 8.1 i2c address and protocol ................................................................................................... 31 8.2 stv82x6 reset .............................................................................................................. .... 31 chapter 9 register list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 9.1 i2c register map ........................................................................................................... ..... 33 9.2 stv82x6 general control registers .................................................................................. 37 9.3 analog block ............................................................................................................... ....... 39 9.4 clocking ................................................................................................................... .......... 41 9.5 demodulator ................................................................................................................ ....... 43 9.6 demodulator channel 1 ..................................................................................................... 4 6 9.7 demodulator channel 2 ..................................................................................................... 4 9 9.8 nicam registers ............................................................................................................ ... 55 9.9 zweiton .................................................................................................................... ........... 56 9.10 sound preprocessing and selection registers .................................................................. 57 9.11 automatic standard recognition ........................................................................................ 64 9.12 smart volume control ...................................................................................................... .. 68 9.13 surround .................................................................................................................. .......... 70 9.14 5- band equalizer ......................................................................................................... ...... 72 9.15 loudness/bass & treble .................................................................................................... 74 9.16 volume/balance control registers .................................................................................... 76 9.17 subwoofer ................................................................................................................. ......... 79 9.18 beeper .................................................................................................................... ............ 80 chapter 10 input/output groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82 chapter 11 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 11.1 absolute maximum ratings .............................................................................................. 86 11.2 thermal data ............................................................................................................. ....... 86 11.3 supply .................................................................................................................... ............ 86 11.4 crystal recommendations ................................................................................................ 87 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) stv82x6 4/97 11.5 analog sound if signal recommendations ..................................................................... 87 11.6 sif to ls/hp/scart path characteristics ....................................................................... 88 11.7 scart to scart analog path characteristics ............................................................... 88 11.8 scart to i2s output path (via adc) characteristics ...................................................... 89 11.9 monoin to adc and i2s output path characteristics .................................................... 89 11.10 i2s to ls/hp/sw path characteristics ............................................................................. 89 11.11 i2s to scart path characteristics .................................................................................. 90 11.12 loudspeaker and headphone volume control characteristics ........................................ 90 11.13 mute performance ......................................................................................................... .. 90 11.14 digital i/os ............................................................................................................ ............. 90 11.15 i2c bus interface ...................................................................................................... ........ 91 chapter 12 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 chapter 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 5 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 5/97 stv82x6 general description 1 general description 1.1 overview the stv82x6 is composed of three main parts: 1. tv sound demodulator : provides all the necessary circuitry for the demodulation of audio transmissions of european and asian terrestrial tv broadcasts. the various transmission standards are automatically detected and demodulated without user intervention. 2. audio processor : based on dsp technology, independently controls loudspeaker, subwoofer and headphone signals. it offers basic and advanced features, such as a st widesurround, equalizer, automatic loudness and smart volume control for television viewer comfort. the stv8226/36 versions can perform additionally the srs ? 3d surround for stereo and mono signals. 3. audio matrix : 3 stereo and 1 mono external analog audio inputs to loudspeakers and headphone, with 2 stereo external analog audio outputs (scart compatible). table 1: stv82x6 version list feature stv8206 stv8216 stv8226 stv8236 am-fm mono xxxx zweiton xxxx nicam xx st widesurround xxxx srs ? 3d surround xx figure 1: package ordering information sdip56 package order code: stv82x6d tqfp80 package order code: stv82x6 (tray) stv82x6t (tape & reel) obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) general description stv82x6 6/97 1.2 typical applications figure 2: typical applicat ion (low-cost stereo tv) figure 3: typical application with subwoofer and headphone stv82x6 tv sound demodulation and audio processing cable and terrestrial analog tv tuner stv82x6 tv sound demodulation and audio processing cable and terrestrial analog tv tuner woofer obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 7/97 stv82x6 general description figure 4: typical application electrical diagram for stv82x6 in sdip56 package mono in sc1 out left sc1 out right sc1 in left sc1 in right sc2 out left sc2 out right lsl sc2 in left sc2 in right sc3 in right sc3 in left lsr subwoofer hpl hpr sif sck ws stereo ident sdo bus1 irq bus0 hpd scl sda +8v +5v +8v +5v +5v +5v reset sdip56 adress select + c31 10uf + c31 10uf c32 100nf c32 100nf + c11 1uf + c11 1uf l2 10uh l2 10uh + c41 1uf + c41 1uf c12 22pf c12 22pf + c10 1uf + c10 1uf r10 22 r10 22 + c38 1uf + c38 1uf + c3 10uf + c3 10uf c4 220nf c4 220nf + c17 47uf + c17 47uf c20 100nf c20 100nf r13 330 r13 330 c14 100nf c14 100nf + c7 1uf + c7 1uf c22 100nf c22 100nf c21 100nf c21 100nf r9 560 r9 560 3 2 1 t1 bc327-40 t1 bc327-40 l3 10uh l3 10uh c39 220nf c39 220nf + c19 10uf + c19 10uf + c26 10uf + c26 10uf r12 10k r12 10k c5 100nf c5 100nf c2 10nf c2 10nf + c30 10uf + c30 10uf c1 100pf c1 100pf c40 100nf c40 100nf r14 100k r14 100k c46 100nf c46 100nf c6 100nf c6 100nf c29 470nf c29 470nf l1 10uh l1 10uh c13 100nf c13 100nf + c37 10uf + c37 10uf r11 10k r11 10k + c36 10uf + c36 10uf r15 270k r15 270k + c44 1uf + c44 1uf sif 1 vtop 2 vrefif 3 vddif 4 gndif 5 monoin 6 ao1l 7 ao1r 8 vdcc 9 gndc 10 ai1l 11 ai1r 12 vmc1 13 vmc2 14 ai2l 15 ai2r 16 vdda 17 gndah 18 ao2l 19 ao2r 20 vddh 21 vrefa 22 ai3l 23 ai3r 24 bgap 25 lsl 26 lsr 27 sw 28 irq 56 bus0 55 bus1 54 sck 53 ws 52 st 51 sdo 50 cktst 49 vdd2 48 gnd2 47 gndp 46 vddp 45 xto 44 xti 43 gndsp 42 gnd1 41 vdd1 40 mck 39 sysck 38 reset 37 reg 36 sda 35 scl 34 adr 33 hpd 32 gndsa 31 hpr 30 hpl 29 ic1 stv82x6 ic1 stv82x6 c27 100nf c27 100nf c23 22pf c23 22pf + c34 10f + c34 10f + c35 10uf + c35 10uf + c25 1uf + c25 1uf 1 2 xt1 27mhz xt1 27mhz + c43 1uf + c43 1uf + c18 10uf + c18 10uf + c24 1uf + c24 1uf + c47 1uf + c47 1uf + c42 1uf + c42 1uf c28 100nf c28 100nf 1 2 3 st1 st1 + c45 1uf + c45 1uf + c9 10uf + c9 10uf l5 10uh l5 10uh + c8 10uf + c8 10uf c33 100nf c33 100nf obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) general description stv82x6 8/97 figure 5: typical application electrical diagram for stv82x6 in tqfp80 package scl headphone detection hp left subwoofer ls right ls left sif irq bus0 mono in sc1 out right sc1 out left sc1 in right sc1 in left sc2 in right sc2 in left sc3 in left sc3 in right sc2 out right sc2 out left hp right sda bus1 sck ws stereo ident sdo +3.3v +3.3v +8v +8v +8v +3.3v +3.3v address select 1 3 tqfp80 reset 220 220 220 220 crystal + c4 1f + c4 1f + c56 10f + c56 10f + c5 1f + c5 1f c25 100nf c25 100nf l11 10h l11 10h l4 10h l4 10h 1 2 3 sl1 sl1 c31 100nf c31 100nf c50 100nf c50 100nf c12 100nf c12 100nf + c76 10f + c76 10f + c6 1f + c6 1f + c17 47f + c17 47f r5 r5 c57 100nf c57 100nf c58 100nf c58 100nf + c77 10f + c77 10f l7 10h l7 10h c26 100nf c26 100nf r12 75 r12 75 + c53 1f + c53 1f c35 100pf c35 100pf c32 220nf c32 220nf r8 r8 + c54 1f + c54 1f + c49 10f + c49 10f + c79 10f + c79 10f + c7 1f + c7 1f c33 100nf c33 100nf r3 560 r3 560 r4 r4 + c40 10f + c40 10f c52 100nf c52 100nf + c45 1f + c45 1f r1 100k r1 100k r10 330 r10 330 ao1l 1 ao1r 2 n/c 3 n/c 4 n/c 5 n/c 6 vddc 7 gndc 8 ai1l 9 ai1r 10 vmc1 11 n/c 12 vmc2 13 ai2l 14 ai2r 15 vdda 16 gndah 17 ao2l 18 ao2r 19 vddh 20 n/c 21 vrefa 22 ai3l 23 ai3r 24 n/c 25 bgap 26 n/c 27 lsl 28 lsr 29 sw 30 hpl 31 hpr 32 gndsa 33 n/c 34 hpd 35 adr 36 n/c 37 n/c 38 scl 39 sda 40 n/c 41 reg 42 reset 43 sysck 44 mck 45 vdd1 46 gnd1 47 n/c 48 gndsp 49 n/c- 50 n/c 51 xti 52 xto 53 vddp 54 gndp 55 gnd2 56 vdd2 57 cktst 58 n/c 59 n/c 60 sdo 61 st/sdi 62 ws 63 sck 64 bus1 65 n/c 66 n/c 67 bus0 68 irq 69 n/c 70 n/c 71 n/c 72 sif 73 vtop 74 vrefif 75 vddif 76 gndif 77 monoin 78 n/c 79 n/c 80 ic1 stv82x6 ic1 stv82x6 + c55 10f + c55 10f + c8 1f + c8 1f + c61 1f + c61 1f r6 10k r6 10k + c51 10f + c51 10f + c36 1f + c36 1f c22 22pf c22 22pf c19 100nf c19 100nf + c39 10f + c39 10f c63 100nf c63 100nf + c41 10f + c41 10f l2 10h l2 10h c21 22pf c21 22pf + c60 1f + c60 1f + c59 10f + c59 10f c14 100nf c14 100nf xt1 27mhz xt1 27mhz r7 10k r7 10k r9 r9 + c78 10f + c78 10f r2 270k r2 270k c44 100nf c44 100nf + c46 1f + c46 1f c34 10nf c34 10nf c16 470nf c16 470nf obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 9/97 stv82x6 general description figure 6: typical compatible appl ication electrical diagram for stv82x6 and stv82x7 in tqfp80 package 47 f r2 220 c68,c69 100 nf * between 2-3 not connected not connected r17 l15,l16 not connected 3 c70,c71 10 f * not connected l13,l14 r18 part 0 ohm c78 330pf c3 c63 note : comp onents with * are only mandatory in case of dolby certification 10h 100 nf c15,c18 r19 r14 10 f not connected tqfp80 220 l2 100 nf strap 100 nf 10h 100 nf 0 ohm not connected not connected not connected between 1-2 reset 10h 220 33 nf 100 nf c21,c22 r15 100h * 1 f with stv82x7 sl2 330pf 330 pf 10h 330pf c64,c65 not connected 22 pf not connected not connected not connected l3 100h * between 2-3 stv82x6 / stv82x7 330 pf r11 stv82x6 / stv82x7 compatible application el ectrical diagram 330pf 220 c41 27 pf c59 not connected 0 ohm r10 not connected not connected not connected not connected crystal not connected 10 f with stv82x6 c23 10h 0 ohm 330 c72,c73 l17,l18 between 1-2 330pf 33 nf not connected not connected c9 * r16 not connected l5,l6 sl3 c74,c75 330pf 10 f c66,c67 47 f not connected strap not connected r12 not connected not connected 220 not connected * 47 f c42 c27,c29 10h l1 330 f 0 ohm 330 pf address select 220 c79 33 nf * strap c43 c30 not connected c10,c13 0 ohm c76,c77 82 l4 270k not connected not connected not connected not connected not connected not connected 10 f 10 f l8 100h * 1 33 nf not connected * 0 ohm c31 100 nf 0 ohm not connected r13 not connected +3.3v +1.8v 1.8v +8v +3.3v +1.8v +1.8v +8v +3.3v +1.8v +1.8v +8v +8v +3.3v +3.3v l6 10h r15 0 + c7 1f + c76 10f + c78 10f + c6 1f + c23 47f c75 l5 10h + c37 1f r1 470k + c3 1f l7 10h sl2 1 2 3 c73 c10 100nf + c47 10f c64 33nf c19 100nf r13 0 + c4 1f xt1 27mhz c34 22nf + c79 47f c71 r4 r19 0 c70 l8 10h l4 10h r18 0 c35 100pf r5 + c55 10f + c61 1f + c39 10f + c59 47f l16 100h r10 330 r9 c69 33nf l2 10h r2 270k + c43 10f ic1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 ao1l ao1r n/c n/c n/c n/c vddc gndc ai1l ai1r vmc1 n/c vmc2 ai2l ai2r vdda gndah ao2l ao2r vddh n/c vrefa ai3l ai3r n/c bgap n/c lsl lsr sw hpl hpr gndsa n/c hpd adr n/c n/c scl sda n/c reg reset sysck mck vdd1 gnd1 n/c gndsp n/c n/c xti xto vddp gndp gnd2 vdd2 cktst n/c n/c sdo st/sdi ws sck bus1 n/c n/c bus0 irq n/c n/c n/c sif vtop vrefif vddif gndif monoin n/c n/c r6 c74 c58 100nf + c9 330f l17 100h c32 220nf c63 + c60 1f + c41 10f + c49 10f c14 100nf l18 100h c33 100nf c42 100nf c27 100nf l3 10h c62 33nf + c53 1f + c17 10f r8 c13 100nf c44 100nf l13 100h c57 100nf l15 100h + c36 1f c26 100nf + c45 1f l11 10h c22 + c40 10f + c5 1f sl1 1 2 3 c12 100nf c68 33nf c16 470nf c66 33nf c50 100nf r17 0 c29 100nf + c8 1f c25 100nf r7 c15 100nf + c51 10f c72 c21 + c38 1f r16 0 c18 100nf + c77 10f r12 82 c31 100nf c30 100nf l1 10h r3 560 c65 33nf sl3 1 2 3 + c46 1f + c48 10f r11 0 r14 0 l14 100h c67 33nf c52 100nf + c54 1f + c56 10f sc2 in left i2s sclk / sdo headphone detection sc3 out right i2s lr clk / sdi sc1 in left spdif in sc1 out left ls left ls right i2s data 0 / ws sc3 in left sc3 in right scl sc4 in left sif sc2 out right sc2 in right irq i2s data 2 / bus1 hp left/ls surround left bus expander / bus0 sc4 in right ls center sc2 out left mono in hp right/ls surround right i2s pcm clk sc1 out right spdif out subwoofer sda i2s data 1 / sck sc1 in right sc3 out left obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) general description stv82x6 10/97 1.3 i/o pin description legend / abbreviations for ta b l e 2 : type: ap = analog power supply dp = digital power supply i = input o = output od = open drain b = bidirectional a = analog table 2: pin description sdip 56 tqfp 80 name type function 1 73 sif a sound if input 274vtopa adc v top decoupling pin 3 75 vrefif a agc voltage reference decoupling pin 4 76 vddif ap 3.3 v power supply for if agc & adc 5 77 gndif ap 0 v power supply for if agc & adc 6 78 monoin a mono input 79/80 n/c not used 7 1 ao1l a left scart1 audio output 8 2 ao1r a right scart1 audio output - 3/4/5/6 n/c not used 9 7 vddc ap 3.3 v power supply for audio dac/adc 10 8 gndc ap 0 v power supply for dac/adc 11 9 ai1l a left scart1 audio input 12 10 ai1r a right scart1 audio input 13 11 vmc1 a switched v ref decoupling pin for audio converters (vmcp) - 12 n/c not used 14 13 vmc2 a v ref decoupling pin for audio converters (vmc) 15 14 ai2l a left scart2 audio input 16 15 ai2r a right scart2 audio input 17 16 vdda ap 3.3 v power supply for audio buffers, matrix & bias 18 17 gndah ap 0 v power supply for audio buffers & scart 19 18 ao2l a left scart2 audio output 20 19 ao2r a right scart2 audio output 21 20 vddh ap 8 v / 5 v power supply for scart & audio buffers - 21 n/c not used 22 22 vrefa a voltage reference for audio buffers 23 23 ai3l a left scart3 audio input 24 24 ai3r a right scart3 audio input - 25 n/c not used 25 26 bgap a bandgap voltage source decoupling obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 11/97 stv82x6 general description - 27 n/c not used 26 28 lsl a left loudspeaker output 27 29 lsr a right loudspeaker output 28 30 sw a subwoofer output 29 31 hpl a left headphone output 30 32 hpr a right headphone output 31 33 gndsa ap substrate analog/digital shield - 34 n/c not used 32 35 hpd b headphone detection input (active low) 33 36 adr i hardware i2c chip address control - 37/38 n/c not used 34 39 scl od i2c serial clock 35 40 sda od i2c serial data - 41 n/c not used 36 42 reg a 5 v power regulator control 37 43 reset i hardware reset (active low) 38 44 sysck b system clock output 39 45 mck b i2s master clock output 40 46 vdd1 dp 3.3v power supply for digital core & io cells 41 47 gnd1 dp 0v power supply for digital core & io cells - 48 n/c not used 42 49 gndsp ap substrate analog/digital shield for clock-pll 50/51 n/c not used 43 52 xti i crystal oscillator input 44 53 xto o crystal oscillator output 45 54 vddp ap 3.3 v power supply for analog pll clock 46 55 gndp ap 0 v power supply for analog pll clock 47 56 gnd2 dp 0 v power supply for digital core, dsps & io cells 48 57 vdd2 dp 3.3 v power supply for digital core, dsps & io cells 49 58 cktst i must be connected to 0 v - 59/60 n/c not used 50 61 sdo b i2s bus data output 51 62 st/sdi b stereo detection output / i2s bus data input 52 63 ws b i2s bus word select output 53 64 sck b i2s bus clock output 54 65 bus1 b i2c bus expander output 1 - 66/67 n/c not used 55 68 bus0 b i2c bus expander output 2 56 69 irq b i2c stat us read request - 70 n/c not used - 71 n/c not used - 72 n/c not used table 2: pin description (continued) sdip 56 tqfp 80 name type function obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) demodulator block stv82x6 12/97 2 demodulator block note: zweiton is the dual (two tone) fm stereo or a2 system. 2.1 digital demodulator 2.1.1 sound if signal the analog sound carrier if is connected to stv82x6 via the sif pin. before analog-to-digital conversion (adc), an automatic gain control (agc) is performed to adjust the incoming if signal to the full scale of the adc. a preliminary video rejection is recommended to optimize conversion and demodulation performances. the agc system provides a wide range of sif input levels and is activated for all standards, except l/l?. in this particular case, the sound carrier is am-modulated and an automatic level adjustment would only damage transmitted audio signal. a preset i2c parameter is required to define the gain of the agc used in manual mode (registers agcc and agcs ). 2.1.2 demodulation the demodulation system operates by default in auto matic mode. in this mode, the stv82x6 is able to identify and demodulate any tv sound standard including nicam and a2 systems (see ta bl e 2 ) without any external control via the i2c interface. it consists of the two demodulation channels (channel 1 = mono left and channel 2 = mono right/stereo) to simultaneously process two sound carriers in order to handle all transmission modes (stereo and up to three mono languages). the built-in automatic standard recognition system (autostd) automatically programs the appropriate bits in the i2c registers which are forced to read-only mode for users (see section 9.1 ). the programming is optimized for each standard to be identified and demodulated. figure 7: demodula tor block diagram mixer mixer dco2 + channel filter fir1 channel filter fir2 am demodulator fm demodulator fm demodulator dqpsk demodulator autostd agc control sif nicam decoder dco1+ zweiton a/d nicaml nicamr am/fm mono am fml fm stereo auto_ctrl(50h) auto_sckm(51h) auto_sckst(52h) auto_stat(54h) demod_stat(0dh) zwt_stat(41h) nicam_stat(3fh) caroffset1(22h) caroffset2(3ah) channel 1 = mono left channel 2 = stereo/mono right agcc(0eh) agcs(0fh) (to sound preprocessing) (to sound preprocessing) (to sound preprocessing) decoder agc amp obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 13/97 stv82x6 demodulator block each mono and stereo standard can be removed (or added) from the list of standards to be recognized by programming registers auto_sckm and auto_sckst , respectively. the identified standard is displayed in register auto_stat and any change to standard is flagged to the host system via pin irq. this flag must be reset by re-programming the msbs of register auto_ctrl while checking the detected standard status by reading registers auto_stat , nicam_stat and zwt_stat . moreover, the detection of stereo mode during demodulation is also flagged in register auto_stat and on output pin st. important : l/l? and d/k standards cannot be automatically processed because the same frequency is used for the mono carrier. an exclusive l/dk selection must programmed in register auto_ctrl . this may be externally controlled by detecting the rf modulation sign, which is negative for all tv standards except l/l?. to recover out-of standard fm deviations or the sound carrier frequency offset, additional i2c controls are provided without interfering with the automatic standard recognition system (autostd). dk-nicam overmodulation recovery : four different fm deviation ranges can be selected (via register auto_ctrl ) for the dk standard while the autostd system remains active. the maximum fm deviation is 500 khz in dk mono mode and 350 khz in dk nicam mode (limited by overlapping fm and nicam spectrum values). the demodulated signal peak level (proportional to the fm deviation) is detected by the peak detector and written to registers peak_det_statl and peak_det_statr . this value is used to implement automatic overmodulation detection via an external i2c control. important : only the selection of the 50 khz fm deviation standard is compatible with the other dk- a2* standards (dk1, dk2 or dk3). these standards must be removed from the list of standards (registers auto_sckm and auto_sckst ) when programming larger fm deviations reserved only for dk-nicam standards. table 3: standards covered by the automati c standard recognition system (autostd) system sound type type name carrier 1 (mhz) carrier 2 (mhz) fm/am deviation de-emphasis roll- off (%) pilot frequency (khz) min. typ. max. m/n fm mono 4.5 15 27 50 75 s fm 2 carriers a2+ 4.724 55.069 b/g fm mono 5.5 27 50 80 50 s fm/nicam 5.850 j17 40 fm 2 carriers a2 5.742 50 s 54.6875 i fm mono 6.0 27 50 80 50 s 100 fm/nicam 6.552 j17 100 l am mono 6.5 0.5 1.0 am/nicam 5.850 j17 40 d/k fm mono 27 50 80 50 s fm/nicam 5.850 j17 40 d/k1 fm 2 carriers a2* 6.258 50 s 54.6875 d/k2 fm 2 carriers 6.742 d/k3 fm 2 carriers 5.742 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) demodulator block stv82x6 14/97 sound carrier frequency offset recovery: both mono and stereo if carrier frequencies can be adjusted independently (registers caroffset1 and caroffset2 ) within a large range (up to 120 khz for standard mono fm deviations) while the autostd system remains active. the frequency offset estimation is written in registers fm_dcl and fm_dcr (mono left / channel 1 and mono right / channel 2, respectively) and can be used to implement the automatic frequency control (afc) via an external i2c control. if required, the autostd system can be disabled (manual mode) and the user can control all registers including those only controlled by the autostd function when active. manual mode is selected in registers reset or auto_sckm . 2.1.3 sound preprocessing and selection the demodulated sound signal can be redirected to 4 different output audio channels: 1. loudspeaker & subwoofer, 2. headphone, 3. scart, 4. i2s interface. each output channel can independently select the demodulator source, analog scart or i2s inputs using register ch_sel . figure 8: sound preprocessing and selection block diagram dc prescaler dematrix fm fm nicam i2s out peak detector fm/am audio in (from input analog audio matrix) (from demodulator) channel & language selection ls in (to loudspeaker processing) hp in (to headphone processing) audio out (to output analog audio matrix) (to i2s interface) (from demodulator) pre_fm(44h) pre_nicam(45h) pre_aux(46h) peak_det_ctrl(4bh) peak_det_statl(4ch) ch_mx(48h) ch_sel(49h) ch_lang(4ah) fm_dcl(42h) fm_dcr(43h) demodulation matrix scart matrix removal prescaler dematrix nicam nicam prescaler scart digital audio matrix de-emphasis nicam de-emphasis fm i2s in pre_aux(46h) ch_mx(48h) i2s matrix prescaler i2s peak_det_statr(4dh) obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 15/97 stv82x6 demodulator block the level of the demodulated sound may require adjusting in order to compensate for the difference in levels between the multiple source (nicam, fm or am) and standard source (fm deviation wide range from 15 to 500 khz) signals. the correct range for all level variations (+24 to -6 db) is selected in registers pre_fm and pre_nicam . the internal sound level of the various sources (fm/am, nicam and scart) is read in registers peak_det_ctrl , peak_det_statl and peak_det_statr before audio processing and can be used to implement automatic pre-scaling via an external i2c interface. in automatic mode, the stv82x6 selects and performs all appropriate de-emphasis, dematrixing, sound selection and mute functions according to the standard and transmission mode detected. mono system : mono audio signals received by an fm or am carrier are demodulated. left and right audio outputs are identical. automatic mute is applied when the mono standard cannot be identified. a2 systems (or zweiton): transmission of mono, stereo or bilingual audio signals using 2 separate fm carriers + identification pilot. the pilot, transmitted by the second carrier, can be modulated by two different tones in order to define stereo or dual-mono mode. if not modulated, only the mono signal is broadcast on the first carrie r. zweiton mode is read in register zwt_stat and described in ta bl e 4 . in the event of poor signal detection, the audio output is switched back to fm mono mode (backup). in dual mono mode, the language (a on channel 1, b on channel 2) can be selected separately for each audio output channel (loudspeaker, headphone, scart or i2s) in register ch_lang . note: a2 and a2* standards are german zweiton, while a2+ is korean zweiton. nicam systems : transmission of mono, stereo, bilingual or trilingual audio signals using a modulated-qpsk carrier and an fm/am sound carrier backup. the digital qp sk modulation broadcasts either channel stereo, dual mono, mono + data or data only. the selected nicam mode is read in register nicam_stat and described in ta bl e 5 . in the event of high bit-error rates, the audio output is automatically switched back to the reserve sound transmission (fm/am mono) or muted if there is no backup. in dual mono or stereo mode with no backup, the language can be selected separately for each audio output channel (loudspeaker, headphone, scart or i2s) in register ch_lang . table 4: a2 system transmission modes system mode zwt-stat [2:0] fm dematrix fm de-emphasis ch_lang [1:0] sound selection sound backup german zweiton mono 100 l,r 50 s xx fm mono x german zweiton stereo 110 (l+r)/2,r 50 s xx fm stereo fm mono german zweiton dual mono (ch1=a, ch2=b) 101 l,r 50 s 01 fm mono a x 10 fm mono b mute korean zweiton mono 100 l,r 75 s xx fm mono x korean zweiton stereo 110 (l+r)/2, (l-r)/2 75 s xx fm stereo fm mono korean zweiton dual mono (ch1 = a, ch2 = b) 101 l,r 75 s 01 fm mono a x 10 fm mono b mute zweiton undefined 0xx or 111 l,r 50 s xx fm mono x obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) demodulator block stv82x6 16/97 note: d1 and d2 define the two channels encoded in the nicam packet. 2.2 system clock the system clock integrates a low-jitter pll clock and can be fully reprogrammed via registers pll_div , pll_md , pll_peh and pll_pel . the default values are designed for a standard 27-mhz quartz crystal frequency , which is the recommended frequency for minimizing potential rf interference in the application. this sinusoidal clock frequency, and any harmonic products, remains outside the tv picture and sound if (pif/sif) and band-i rf passbands and has been selected in order to reduce the risk of potential interference to the tv if and rf system. however, if required, the pll clock can be re-programmed for an other quartz crystal frequency within a range between 23 and 30 mhz. note: a change in the crystal frequency is compatible with other default i2c programming values, including those of the built-in automatic standard recognition system. table 5: nicam system transmission modes system mode nicam_stat[ 4:1] nicam de-emphasis ch_lang[1:0] sound selection sound backup nicam stereo 1000 j17 xx nicam stereo fm/am mono nicam dual mono (ch1 = a, ch2 = b) 1010 j17 01 nicam mono a fm/am mono 10 nicam mono b mute nicam mono+data (d1 = a, d2 = data) 1001 j17 xx nicam mono a fm/am mono nicam data 1011 j17 xx fm/am mono x nicam stereo (no backup) 0000 j17 01 fm/am mono a x 00 nicam stereo mute nicam dual mono (no backup) (d1 = b, d2 = c) 0010 j17 01 fm/am mono a x 10 nicam mono b mute 11 nicam mono c nicam mono+data (no backup) (d1 = b, d2 = data) 0001 j17 01 fm/am mono a x 10 nicam mono b mute nicam undefined (no backup) x1xx j17 xx fm/am mono x obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 17/97 stv82x6 audio processor block 3 audio processor block 3.1 main features the stv82x6 audio processor is based on a dedica ted audio digital signal processor (dsp) that performs basic and advanced audio post-processing for 4 different output audio channels. 3.1.1 loudspeaker and subwoofer features smart volume control (see note 1 ) spatial effects: ? pseudo stereo (for mono source) ? st widesurround (?movie? and ?music? modes for stereo source) 5-band equalizer volume and balance controls (see note 4 ) automatic loudness control subwoofer (see note 4 ) beeper (see note 3 ) additionally on stv8226/36 only: srs ? 3d mono signal processing srs ? 3d stereo signal processing 3.1.2 headphone (see note 2 ) smart volume control (see note 1 ) bass and treble controls volume and balance controls beeper (see note 3 ) note: 1 the smart volume control can be used in either the loudspeaker or headphone path, but not both at the same time. 2 the headphone is forced into mono m ode when the subwoofer is active. 3 the beeper is common for both the loudspeaker and the headphone. 4 the auto-mute function is activated when a headphone plug is detected. 5 all audio postprocessing can be disabled. 3.1.3 scart 1 and 2 outputs no audio post-processing 3.1.4 i2s output no audio post-processing obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) audio processor block stv82x6 18/97 note: the audio signals available on the i2s and scart outputs are not affected by any digital or analog matrix processing. 3.2 smart volume control (svc) the smart volume control (svc) feature is designed to process sound level variations caused by changes in signal sources (e.g. when switching channels) or in volume (e.g. when advertisements are broadcast). the svc is controlled by the svc_on bit in the svc_ctrl register. when the svc_on bit is set, the smart volume control prevents annoying volume changes by automatically adjusting the selected sound source (demodulator or scart) to a programmable reference level before audio processing. the regulation ranges from +6 db to -30 db with a fast attenuation and a programmable slow amplification. the fast attenuation reduces audio peak (and potential clipping) and slow amplification is a compromise between regulation recovery and limited audio amplification during audio silence. the programmable output reference level must be defined to prevent internal clipping depending on the selected audio processing boosting functions such as surround (up to +9 db), equalizer or bass/treble (up to +12 db) and loudness (up to +6 db). when the svc is enabled, recommended reference values are -18 db for the loudspeaker path and -9 db for the headphone path. when the svc is disabled, it acts as a wide-range prescaler (between -30 db and +15.5 db) before audio-processing to prevent internal clipping depending on the selected functions (see above). if figure 9: audio processor block diagram equalizer loudness spatial effects balance volume ls in volume lowpass beeper bass/ woofer balance volume srs 1 0 (l+r)/2 (l+r)/2 treble 5-band (from digital audio matrix) loudspeaker processing ls out sw_on sw out hp out headphone processing gain hp in (from digital audio matrix) low audio audio mute smart volume control beeper_ctrl (79h) beeper_tone (7ah) svc_sel (59h) svc_ctrl (5ah) ls_eq_ctrl (60h) ls_eq_band1 (61h) ls_eq_band2 (62h) ls_eq_band3 (63h) ls_eq_band4 (64h) ls_eq_band5 (65h) ls_bal(69h) sw_band (6bh) sw_gain (6ah) ana_ls_hp (07h) hpd ls_vol_ctrl(67h) ls_cvol(68h) ls_srd_ctrl (5bh) ls_sts_gain (5ch) ls_sts_freq (5dh) ls_srs_space (5eh) ls_srs_center (5fh) ana_ls_hp (07h) hp_vol_ctrl (75h) hp_cvol (76h) hp_bal (77h) hp_bt_ctrl (71h) hp_bass_gain (72h) hp_treb_gain (73h) svc_sel (59h) svc_ctrl (5ah) cut_id (00h) ana_ls_hp (07h) low noise noise mute ls_loud(66h)_ smart volume control obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 19/97 stv82x6 audio processor block required, it complements the dedicated prescaler for fm, nicam or scart sources. the internal level can be measured using the peak detector. the svc can be used either in the loudspeaker or headphone path (but not both simultaneously). when used in the headphone path, the svc prevents the sound level from becoming suddenly too strong, causing ear damage. the svc is configured in registers svc_sel and svc_ctrl . 3.3 st widesurround stv82x6 offers three preset st widesurround effects on the loudspeaker path: music, a concert hall effect movie, for films on tv simulated stereo, which generates a pseudo-stereo effect from mono source ?st widesurround? is an extension of the conventi onal stereo concept which improves the spatial characteristics of the sound. this could be done si mply by adding more speakers and coding more channels into the source signal as is done in the cinema, but this approach is too costly for normal home use. the st widesurround system exploits a method of phase shifting to achieve a similar result using only two speakers. it restores spat iality by adding artificial phase differences. the surround/pseudo-stereo mode is automatically selected by the automatic standard recognition system (autostd) depending on the detected stereo or mono source. by default, ?movie? is selected for surround mode. this value may be changed to ?music? by the sts_mode bit in the ls_srd_ctrl register. additional user controls are provided to better adapt the spatial effect to the source. the st widesurround gain ( ls_sts_gain ) and st widesurround frequency ( ls_sts_freq ) registers can be used to enhance music predominance in music mode and theater effect + voice predominancy in movie mode. 3.4 5-band audio equalizer the loudspeaker audio spectrum is split into 5 fr equency bands and the gain of each of them can be adjusted within a range from -12 db to +12 db in steps of 1 db. the audio equalizer may be used to pre-define frequency band enhancement features dedicated to various kinds of music or to attenuate frequency resonances of loudspeakers or the listening environment. the equalizer is enabled by the eq_on bit in the ls_eq_ctrl register. the bass, medium and treble values are programmed in registers ls_eq_band[1:5] . 3.5 bass/treble control the gain of bass and treble frequency bands for the headphone can be also tuned within a range from -12 db to +12 db in steps of 1 db. it may be used to pre-define frequency band enhancement figure 10: equalizer f 1 =100hz f 2 =330hz f 3 =1khz f 4 =3.3khz f 5 =6.6khz obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) audio processor block stv82x6 20/97 features dedicated to various kinds of music, to implement programmable loudness or super-bass functions. the headphone bass/treble feature is enabled by setting the bt_on bit in the hp_bt_ctrl register. the bass and treble gain values are adjusted in registers hp_bass_gain and hp_treble_gain , respectively. 3.6 volume/balance control the stv82x6 provides a volume/balance control for each of the loudspeaker, subwoofer and headphone audio outputs. its wide range (from 0 to -96 db in a linear scale) largely covers typical home applications (approx. 60 db) while maintaining a good s/n ratio. its fine resolution (0.375 db) provides simple volume programming and a relative osd scale representation. the loudspeaker, subwoofer and headphone volume values should be programmed progressively in steps of less than 1 db in order to prevent audible envelope variations and a minimum duration of 16 ms is required between two successive programming commands to guarantee that there are no audible plops during volume changes. in this case, a full 8-bit volume scan with minimum steps of 0.375 db will last approximately 4 s (minimum). the volume/balance control can operate in one of two different modes: in differential mode (default value), the volume control is a common volume value for both the left and right loudspeaker and headphone channels. in independent mode , the volume for the left and right channels for loudspeakers or headphone is controlled independently. as the loudspeaker bass frequencies are output by the subwoofer, its reference volume is controlled by default with the value of the ls_cvol common volume register. the sw_gain register value is used to adjust the level of the su bwoofer output in regards to this reference. in independent mode, the sw_gain register is used as a separated volume control and does not take into account the loudspeaker audio level. 3.6.1 differential mode the common value for the right/left volume controls for the loudspeaker, subwoofer and headphone outputs are programmed in registers ls_cvol , sw_gain and hp_cvol , respectively. a differential balance can be applied using registers ls_bal and hp_bal to adjust the left/right level ratio as shown in figure 12 . figure 11: volume control output gain 0db -96 db mute 00h ffh i2c control obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 21/97 stv82x6 audio processor block 3.6.2 independent mode this is enabled by setting the bal_mode bits in both the ls_vol_ctrl and hp_vol_ctrl registers to independent mode. in this case, the register values are used to control the volume/ balance functions as described in ta bl e 6 . 3.6.3 mute control an independent mute control can be used to smooth audio envelope variations in order to prevent any audible plops can be applied to all audio outputs. this feature is controlled by register ana_ls_hp . a headphone detection mode that will automatically mute the loudspeaker and subwoofer outputs when a headphone is detected can be enabled by the hdp_on bit in the ana_ls_hp register. in this case, only the headphone output will remain active. see also section 3.8: subwoofer control and section 5.4: headphone detection . when a demodulated source is selected on the audio output, the mute is also controlled by automatic standard recognition system (autostd). in case of no mono detected or bad detection of language without backup, the corresponding audio output is automatically muted. in case of multi-language, the output will be de-muted by selecting an other language with backup. figure 12: differ ential balance table 6: volume/balance control registers mode ls_cvol/ls_vol_l hp_cvol/hp_vol_l register 68h/76h ls_bal/ls_vol_r hp_bal/hp_vol_r register 69h/77h ls_vol_ctrl (loudspeaker volume control) bal_mode = 0 (independent mode) ls_vol_l left volume value ls_vol_r right volume value bal_mode = 1 (differential mode) ls_cvol common right/left volume value ls_bal differential balance value hp_vol_ctrl (headphone volume control) bal_mode = 0 (independent mode) hp_vol_l left volume value hp_vol_r right volume value bal_mode = 1 (differential mode) hp_cvol common right/left volume value hp_bal differential balance value output gain 100% mute 80h 7fh i2c control 00h right c hanne l left channel obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) audio processor block stv82x6 22/97 3.7 automatic loudness control as the human ear does not hear the audio frequency range the same way depending on the power of the audio source, the loudness control corrects this effect by sensing the volume level and then boosting bass and treble frequencies proportionally to middle frequencies at lower volume. while maintaining the amplitude of the 1 khz components at an approximately constant value, the gain values of lower and higher frequencies are automatically progressively amplified up to +18 db when the audio volume level decreases.the maximum treble amplification can be adjusted from 0 db (first order loudness) to +18 db (second order loudness). as the volume is proportional to the external audio amplification power, the loudness ampl ification threshold is programmable in order to tune the absolute level. the loudspeaker loudness function is enabled by setting the loud_on bit in register ls_loud . the loudness threshold and maximum treble gain values are also programmed in this register. two bass cut-off frequencies are available: 40 hz for normal mode 120 hz for bass amplified mode the mode is selected by the loud_freq bit in register ls_loud (66h). 3.8 subwoofer control the subwoofer signal is created by adding the bass frequency of the left/right loudspeaker channels. the subwoofer output is enabled by setting the sw_on bit in register ana_ls_hp . this will also force the headphone output into mono mode. the subwoofer gain and frequency bandwidth values are programmed in registers sw_gain and sw_band , respectively. the cut-off frequency can be adjusted from between 50 and 400 hz in steps of 50 hz. 3.9 beeper the beeper is used to replace the audio signal with a tone on the loudspeaker or headphone outputs. it can be used for various applications such as beep sounds for remote control, alarm clock or other features. table 7: headphone/mute register configuration ana_ls_hp register output status hpd_in hpd_on sw_on mute_ls mute_sw mute_hp muted active x 0 0 0 x 0 sw ls, hp stereo x x 1 0 0 1 hp ls & sw x x x 1 1 1 ls, sw & hp (channel change: mute all) x 0 1 0 0 0 ls, sw & hp mono 0 1 0 0 0 0 sw & hp ls (default) 1 1 0 0 0 0 sw & ls hp stereo obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 23/97 stv82x6 audio processor block the beeper operates in one of two modes: pulse mode (beep applications) a tone with a programmable short duration (between 128 ms and 1 s) is generated. afterwards, the beeper is automatically disabled and the output is switched back to the audio signal. continuous mode (alarm application) a tone with a programmable long duration is generated. its start and stop controls must be programmed by i2c. in both modes, it is recommended to use the mute function to smooth the audio-to-beeper and beeper-to-audio (continuous mode only) transitions. the second transition is automatically muted in pulse mode. beeper parameters are controlled in register beeper_ctrl . the beeper tone level and frequency are programmed in register beeper_tone . the level (or volume) ranges between 0 db and -93 db in steps of 3 db and the tone frequency ranges between 62.2 hz and 8 khz in steps of 1 octave. a beep generator is shared only by the loudspeaker or headphone outputs. therefore, in the event of simultaneous beeps when in pulse mode, only the first beep will define the effective duration that will be the same for both outputs. note: the audio output is not affected by the automatic mute control of automatic standard recognition function when the beeper is activated. 3.10 srs? 3d surround (stv8226/36 only) in addition to st widesurround, the stv8226/36 provides srs? 3d stereo and mono outputs which are spatial effects patented by srs labs. the srs? system is available on the ic when the srs_on bit of register cut_id is set (stv8226/36 identification). st and srs? surround systems cannot be used simultaneously. these signals are output only on the loudspeaker path. figure 13: pulse mode figure 14: continuous mode 0.125s < t < 1s 62.5 hz < f < 8 khz beep_on = 1 beep_on = 0 t predefined 62.5 hz < f < 8 khz beep_on = 1 beep_on = 0 t defined by i2c write obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) audio processor block stv82x6 24/97 srs? creates a fully immersed three-dimensional soundfield through the use of a standard 2-speaker stereo configuration. for monaural audio, the source is first converted into a synthetic stereo signal before creating the 3d effect. the virtual gain for the surround and center components can be adjusted by registers ls_srs_space and ls_srs_center (respectively) in stereo mode only. these values are used to adapt spatial effects to the source. for st widesurround sound, stereo or mono output mode is automatically selected by the automatic standard recognition system (autostd) according to the detected audio source. by default, st widesurround sound is selected. srs? surround is selected in register ls_srd_ctrl . obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 25/97 stv82x6 audio matrices 4 audio matrices in addition to the sound carrier source (sif), the stv82x6 accepts up to three analog stereo audio inputs (2 v rms scart compatible) and one analog mono audio input (0.5 v rms ). these different sources can go back out through four analog stereo audio outputs which are loudspeaker + subwoofer and headphone (1 v rms ) and two compatible scart audio outputs (2 v rms ). an extra digital stereo output (i2s compatible) is available for interfacing with a dolby pro logic decoder or an external digital-to-analog converter (dac). figure 15: audio matrix block diagram scart1 in scart2 in scart3 in mono in i2s ls scart1 out scart2 out a/d d/a lang. select ch_sel (49h) low noise mute sw1 sw2 sw3 sw4 sw6 sw7 d/a low noise mute sw5 d/a sw low noise low noise switch demodulator level prescaling ch_lang (4ah) ch_sel (49h) ch_lang (4ah) ch_sel (49h) ch_lang (4ah) ch_sel (49h) ch_lang (4ah) ana_scart (06h) ana_scart (06h) ana_scart (06h) ch_mx (48h) demod. matrix ch_mx (48h) sif monoin (ai1l, ai1r) (ai2l, ai2r) (ai3l, ai3r) (ao1l, ao1r) (ao2l, ao2r) sdo (lsl, lsr) sw (hpl, hpr) lang. select audio dsp hp d/a lang. select audio dsp low noise mute lang. select scart matrix low noise mute switch low noise low noise mute switch i2s i2s matrix ch_mx (48h) sdi obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) audio matrices stv82x6 26/97 4.1 input audio matrix the mono input (monoin) and three stereo scart inputs (ai1l, air1), (ai2l, ai2r) and (ai3l, ai3r) can be switched to any audio output and the same source can be connected to different outputs. the inputs can totally bypass the stv82x6 functions (thru mode) via the full analog scart path or use the audio processing corresponding to the different audio outputs. the input matrix is programmed in bits dsp_iscart_sel[1:0] of register ana_scart . in thru mode, the stv82x6 is switched into low power mode (standby) and the audio matrix configuration (ana_scart register) is memorized and is not reset when switched back to full power mode. see section 7.2: standby mode . before processing the audio signal, the selected analog input is converted into a digital 16-bit signal and pre-processed. its sound level can be prescaled within a range between -6 db and +6 db in steps of 1 db (register pre_aux ) and for left/right channels (register ch_mx ). the internal level can be measured with the peak level detector. 4.2 output audio matrix the loudspeaker+subwoofer (lsl, lsr, sw), headphone (hpl, hpr) and i2s (sdo) outputs can directly select two possible sources which are either the demodulated signal or the converted audio input (from the scart or mono input) in register ch_sel . in the event of a dual mono source, the language is selected in register ch_lang . the two analog scart outputs (ao1l, ao1r) and (ao2l, ao2r) can be used to bypass the stv82x6 functions by directly selecting the analog input scarts or the output digital source from the demodulator or the converted audio input (w ith prescaling and left/right re-matrixing). the scart output is selected in register ana_scart and the digital source in register ch_sel . in the event of a dual mono source, the language is selected in register ch_lang as other audio outputs. in the event of a demodulator source selection, the mute is automatically controlled for all audio outputs. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 27/97 stv82x6 additional controls and flags 5 additional controls and flags 5.1 interrupt request the identified tv sound standard is displayed in register auto_stat . each change in the detected standard is flagged to the host system via hardware pin irq. the flag must be reset by re- programming the irq bit in register auto_ctrl and then checking the detected standard status by reading registers auto_stat, nicam_stat, zwt_stat and ch_mx. 5.2 i2c bus expander pins bus0 and bus1 can be used to control external switchable if saw filters or audio switches. these pins can be directly programmed by register ctrl . 5.3 stereo flag for loudspeakers only, a stereo mode detection flag (the st_id bit in register auto_stat ) is set when a demodulated source is selected and a stereo standard is detected. the stereo flag is also output on pin st in order to control an external indicator (e.g. led). the stereo mode is also displayed by status register auto_stat . caution: when the i2s input is selected, the stereo flag is no longer available on pin st. 5.4 headphone detection for the headphone, the hpd input can be used to automatically mute the loudspeaker and subwoofer outputs when the hpd_on bit is set in register ana_ls_hp (active low). the hpd pin must be set for the mute function to be active. figure 16: headphone detection audio matrix mute control headphone left right sub- i2c control stv82x6 loudspeaker audio processing headphone audio processing subwoofer audio processing woofer detection obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) i2s interface stv82x6 28/97 6 i2s interface a digital stereo input is available for a virtual dolby source from an external decoder. a digital stereo output (i2s compatible) is available for routing the demodulated signal or a converted input audio signal into a dolby pro logic decoder or an external dac. the stv82x6 i2s interface drives the serial bus (sck, ws, sdo) in master mode in format 32.fs with a sampling frequency (f s ) of 32 khz. an additional master clock (mck) in format 256.fs (f s = 8.192 mhz) is provided if required for the slave interface. both philips and sony modes are supported with programmable word selection (ws) polarity (register i2s ). by default, all i2s digital outputs are set in high impedance and must be switched to low impedance via register ctrl before use. a clock system output (sysck) is also availa ble for clock peripherals using the same quartz frequency as the stv82x6. by default, this clock output (identical to the crystal oscillator) is set to high impedance and must be switched to low impedance via register ctrl before use. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 29/97 stv82x6 power supplies 7 power supplies 7.1 supply voltages the stv82x6 supports different power configurations due to its integrated voltage regulators. typically, two power supplies, which are grouped into two sets of ic pins, are required. 1. digital power supply (dps) this supply may be either 3.3 v or 5 v if an external power transistor is used. the dps supplies pins vdd1, vdd2 and vddp. ?in 3.3 v mode , the power is directly supplied to the digital power pins. in this case, the reg pin is not used and must be connected to the ground. ? 5v mode requires the use of an external transistor coupled to the integrated voltage regulator via the reg pin in order to generate a stable 3.3 v supply to the digital power pins. 2. analog power supply (aps) this supply may be either 8 v or 5 v. in both cases, external resistors are required, except for pin vddh. the aps supplies pins vddif, vddc, vdda and vddh. ? the 8 v power supply is directly connected to pin vddh and offers a 2 v rms dynamic voltage on scart outputs. the other analog power pins can be supplied with an 8 v or 5 v supply through external resistors. ? if only a 5 v power supply is available for pin vddh, the scart outputs will be reduced to 1v rms . in this case, the sel5v bit must be set in register ana_ctrl . figure 17: 3.3v / 8v or 3.3v / 5v application 3.3 v regulator digital core clock generator audio buffer analog reg vddh stv82x6 3.3 v dps standby vdd1 vdd2 vddp vddif vddc vdda 8 or 5 v aps core digital 3.3 v regulator analog obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) power supplies stv82x6 30/97 7.2 standby mode the stv82x6 provides a thru mode configuration that bypasses ic functions via a scart i/o pin (full analog path only). in this case, only minimum power is required (standby mode). in standby mode, the digital and analog power supplies are switched off, except for pins vdda and vddh which are used to maintain the scart path , the last configuration programmed for analog matrixing (register ana_scart ) and the power configuration (register ana_ctrl ). when switching back to normal full power mode, all i2c registers are reset except for those used in standby mode to maintain the original configuration. in standby mode, the i2c bus does not operate. however, the bus can still be used by other ics since the i2c i/o pins (sda and scl) of the stv82x6 are forced into a high-impedance configuration. figure 18: 5 v / 8 v or 5 v / 5 v application digital core clock generator audio buffer analog reg vddh stv82x6 5v dps standby vdd1 vdd2 vddp vddif vddc vdda 8 or 5 v aps core 3.3 v regulator analog 3.3 v regulator digital obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 31/97 stv82x6 i2c bus 8i2c bus 8.1 i2c address and protocol the stv82x6 i2c interface works in slave mode and is fully compliant with i2c standards in fast mode (maximum frequency of 400 khz). two pairs of i2c chip addresses are used to connect two stv82x6 chips to the same i2c serial bus. the device address pairs are defined by the polarity of the adr pin and are listed in the following table: protocol description write protocol read protocol w = write address, r = read address, a = acknowledge, n=no acknowledge. sub-address is the register address pointer; this value auto-increments for both write and read. the stv82x6 cannot immediately reply to an i2c read request when addressing dsp registers (addresses 40h and greater).the i2c interface holds the i2c serial clock (scl) line low before each data byte is read to compensate for the latency of the dsp response (64 s in worst case). the implemented i2c pulling down mode is compatible with a continuous or stopped scl when held low (restart at high level, if stopped) and operates between 24 khz and 400 khz. if scl pulling down mode is not supported by the master i2c interface, the pulling down system can be de- activated by setting the sclpd_off bit in register reset . in this case, two successive reads of the same dsp register are required and only the seco nd one is valid (first read is ?don?t care?). this special protocol is no longer compatible with th e i2c sub-address auto-incrementation function in read mode. 8.2 stv82x6 reset all stv82x6 features are controlled via the i2c bus. however, the device is designed to power up into a fully working default mode without having to be sent i2c bus data to set it up. the stv82x6 can be "reset" in 2 ways: 1. by software via the i2c bus: this clears all synchronous logic, except for the i2c bus registers. 2. by hardware via the re set pin: in addition to clearing all sync hronous logic, the reset input (active low) resets all the i2c bus registers to the default values listed below. table 8: i2c read/write addresses adr write address (hex) (w) read address (hex) (r) low (connected to gnd1) 80h 81h high (connected to vdd1) a0h a1h start w a sub-address a data a .... a data a stop start w a sub-address a stop start r a data a .... a data n obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) i2c bus stv82x6 32/97 table 9: reset default values function default mode demodulation auto-standard on scanned standards m/n, b/g, i, l/l? fm deviation 125 khz (max.) audio outputs automatic mute mode on loudspeaker source demodulated sound loudspeaker volume -48 db / muted loudspeaker l/r balance l/r = 100% subwoofer -48 db / off headphone source demodulated sound headphone automatic detection on headphone volume -48 db / muted headphone l/r balance l/r = 100% scart-1 out demodulated sound scart-2 out scart1 source i2s out off audio processing loudspeaker/headphone svc off, 0 db reference value loudspeaker surround off loudspeaker 5-band equalizer off, 0 db (flat band) loudspeaker loudness off headphone bass/treble off, 0 db (flat band) loudspeaker/headphone beeper -48 db / off obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 33/97 stv82x6 register list 9 register list note: the unused bits (defined as reserved) in i2c registers must be kept to zero. the system clock registers (from address 08h to 0bh) do not need to be modified if a standard 27 mhz quartz crystal is used the demodulator registers (from address 0ch to 54h) default values are optimum and any change is not recommended, except for: agcs (0fh) to adjust agc gain for am carrier in l/l? standard (agc used in open loop) caroffset1(22h) and caroffset2(3ah) to compensate if carrier frequency with an out- of-standard offset soundlevel prescaling pre_fm(44h), pre_nicam(45h) and pre_aux(46h) to equalize demodulated or external audio signal before audio processing. peak detector registers peak_det_ctrl(4bh) and peak_det_ stat(4ch) can be used to measure internal sound level. sound source selection for each audio output channel loudspeaker+subwoofer, headphone, scart and i2s to be done using ch_sel(49h) in multi-lingual mode, ch_lang(4ah) selects separately the language for each audio output channel. auto_ctrl(50h) to select between l/l? or d/k/k1/k2/k3 standard which can be discriminated automatically. to be used also to change maximum fm deviation (125 khz, by default) in case of wide overmodulation. auto_sckm(51h) and auto_sckst(52h) to define the list of mono and stereo standards to be recognized automatically. note: () used in reset value column means that the bit or the byte is read-only. (s) symbol indicates that the field value is represented in signed binary format. (*) the field agc_err[4:0] (agcs) can be written by user if the bit agc_cmd (agcc) is set to one (by default controlled by autostd). to be used to adjust manually the input gain of analog agc amplifier for am carrier (l/l?). 9.1 i2c register map by default, all i2c registers controlled by automatic standard recognition system (autostd) are forced to read-only mode for the user. these registers and bits are shaded in ta bl e 1 0 . table 10: list of i2c registers (sheet 1 of 5) name addr. (hex) reset value (bin) register function and description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ic general control cut_id 00h (0001 0001) srs_on 0 cut_number[5:0] reset 02h 0000 0000 0 sclpd_of f auto_off 0 0 soft_lrs t1 soft_lrs t2 soft_rst ctrl 03h 0000 0000 0 bus_expand[1:0] i2s_en sdi_en 0 mck_en sysck_en i2s 04h 0000 0000 0 0 0 0 i2s_std i2s_wspo l 00 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 34/97 audio mute & switch ana_ctrl 05h 0000 0000 sel5v 0 0 0 0 0 0 0 ana_scart 06h 0010 1100 dsp_iscart_sel[1:0] mute_osc art2 oscart2_sel[1:0] mute_osc art1 oscart1_sel[1:0] ana_ls_hp 07h (0)100 0111 hpd_in hpd_on sw_on 0 0 mute_ls mute_sw mute_hp clocking pll_div 08h 0000 0101 0 0 sdiv[2:0] fdiv[2:0] pll_md 09h 0001 1110 0 0 0 md2[4:0] pll_peh 0ah 0000 0001 0 0 0 0 pe1[11:8] pll_pel 0bh 1110 1000 pe1[7:0] demodulator demod_ctrl 0ch 0000 0110 0 0 0 0 am_sel demod_mode[2:0] demod_stat 0dh (0000 0000) 0 0 0 qpsk_lk fm2_car fm2_sq fm1_car fm1_sq agcc 0eh 0001 0001 agc_ cmd 0 0 agc_ref[2:0] agc_cst[1:0] agcs 0fh (0000 0000) 0 agc_err[4:0] (*) sig_over sig_unde r dcs 10h (0000 0000) dc_err[7:0] demodulator channel 1 carfq1h 12h 0011 1110 carfq1[23:16] carfq1m 13h 1000 0000 carfq1[15:8] carfq1l 14h 0000 0000 carfq1[7:0] fir1c0 15h 0000 0000 fir1c0[7:0] (s) fir1c1 16h 1111 1110 fir1c1[7:0] (s) fir1c2 17h 1111 1100 fir1c2[7:0] (s) fir1c3 18h 1111 1101 fir1c3[7:0] (s) fir1c4 19h 0000 0010 fir1c4[7:0] (s) fir1c5 1ah 0000 1101 fir1c5[7:0] (s) fir1c6 1bh 0001 1000 fir1c6[7:0]6 (s) fir1c7 1ch 0001 1111 fir1c7[7:0] (s) acoeff1 1dh 0010 0011 acoeff1[7:0] bcoeff1 1eh 0001 0010 bcoeff1[7:0] crf1 1fh (0000 0000) crf[7:0] (s) ceth1 20h 0010 0000 ceth1[7:0] sqth1 21h 0011 1100 sqth1[7:0] caroffset1 22h 0000 0000 caroffset1[7:0] (s) demodulator channel 2 iagcr 25h 1000 1000 iagc_ref[7:0] iagcc 26h 0000 0011 iagc_ off 0 0 0 0 iagc_cst[2:0] table 10: list of i2c registers (sheet 2 of 5) name addr. (hex) reset value (bin) register function and description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 35/97 stv82x6 register list iagcs 27h (0000 0000) iagc_ctrl[7:0] carfq2h 28h 0100 0100 carfq2[23:16] carfq2m 29h 0100 0000 carfq2[15.8] carfq2l 2ah 0000 0000 carfq2[7:0] fir2c0 2bh 0000 0000 fir2c0[7:0] (s) fir2c1 2ch 0000 0000 fir2c1[7:0] (s) fir2c2 2dh 0000 0000 fir2c2[7:0] (s) fir2c3 2eh 0000 0000 fir2c3[7:0] (s) fir2c4 2fh 1111 1111 fir2c4[7:0] (s) fir2c5 30h 0000 0100 fir2c5[7:0] (s) fir2c6 31h 0001 0100 fir2c6[7:0] (s) fir2c7 32h 0010 0101 fir2c7[7:0] (s) acoeff2 33h 1001 0000 acoeff2[7:0] bcoeff2 34h 1010 1100 bcoeff2[7:0] scoeff 35h 0001 1100 scoeff[7:0] srf 36h (0000 0000) srf[7:0] (s) crf2 37h (0000 0000) crf2[7:0] (s) ceth2 38h 0010 0000 ceth2[7:0] sqth2 39h 0011 1100 sqth2[7:0] caroffset2 3ah 0000 0000 caroffset2[7:0] (s) nicam nicam_ctrl 3dh 0000 0000 0 0 0 0 0 dif_pol ect mae nicam_ber 3eh (0000 0000) error[7:0] nicam_stat 3fh (0000 0000) nic_det f_mute loa cbi[4:1] nic_mute stereo fm zwt_ctrl 40h 0011 0001 0 std_mode thresh[3:0] tsctrl[1:0] zwt_stat 41h (0000 0000) 0 0 0 0 0 zw_det zw_st zw_dm sound preprocessing & selection fm_dcl 42h (0000 0000) fm_dcl[7:0] (s) fm_dcr 43h (0000 0000) fm_dcr[7:0] (s) pre_fm 44h 0000 0110 0 0 fm_prescale[5:0] (s) pre_nicam 45h 0000 1101 0 0 nicam_prescale[5:0] (s) pre_aux 46h 0000 0000 i2s_prescale[3:0] (s) scart_prescale[3:0] (s) ch_ctrl 47h 0000 0000 mute_d01 2 mute_d12 nic_dmx nicdph_o ff fm_dmx[1:0] fmdph_of f fmdph_s w ch_mx 48h 0000 0000 i2s_mx[1:0] sc_mx[1:0] demod_mx[3:0] ch_sel 49h 0000 0000 i2s_sel[1:0] sc_sel[1:0] hp_sel[1:0] ls_sel[1:0] ch_lang 4ah 0000 0000 i2s_lang[1:0] sc_lang[1:0] hp_lang[1:0] ls_lang[1:0] table 10: list of i2c registers (sheet 3 of 5) name addr. (hex) reset value (bin) register function and description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 36/97 peak_det_ctrl 4bh 0000 0000 0 0 0 0 0 0 pd_sel[1:0] peak_det_statl 4ch (0000 0000) peak_level_left[7:0] peak_det_statr 4dh (0000 0000) peak_level_right[7:0] automatic standard recognition system auto_ctrl 50h 0000 0001 0 0 0 irq single_sh ot dk_dev[1:0] ldk_sw auto_sckm 51h 0000 1111 0 0 0 0 ldk_sck i_sck bg_sck mn_sck auto_sckst 52h 0001 1111 ldk_zwt3 ldk_zwt2 ldk_swt1 ldk_nic i_nic bg_zwt bg_nic mn_zwt auto_timer 53h 1010 0100 fm_time[1:0] nicam_time[2:0] zweiton_time[2:0] auto_stat 54h 0(000 0000) st_id stereo_s tat e mono_sta te auto_on stereo_sid[1:0] mono_sid[1:0] audio processing svc_sel 59h 0000 0000 0 0 0 0 000 svc_sw svc_ctrl 5ah 0000 0000 svc_on svc_time[1:0] svc_ref[4:0] (s) ls_srd_ctrl 5bh 0000 0000 srd_on 0 0 0 0 srd_sel srd_ster eo sts_mode ls_sts_gain 5ch 1000 0000 st_gain[7:0] ls_sts_freq 5dh 00010101 0 0 bass_freq[1:0] medium_freq[1:0] treble_freq[1:0] ls_srs_space 5eh 1000 0000 srs_space[7:0] (for stereo mode only) ls_srs_center 5fh 1000 0000 srs_center[7:0] (for stereo mode only) ls_eq_ctrl 60h 0000 0000 eq_on 0 0 0 0 0 0 r ls_eq_band1 61h 0000 0000 0 0 0 eq_band1_gain[4:0] (s) ls_eq_band2 62h 0000 0000 0 0 0 eq_band2_gain[4:0] (s) ls_eq_band3 63h 0000 0000 0 0 0 eq_band3_gain[4:0] (s) ls_eq_band4 64h 0000 0000 0 0 0 eq_band4_gain[4:0] (s) ls_eq_band5 65h 0000 0000 0 0 0 eq_band5_gain[4:0] (s) ls_loud 66h 0000 0010 loud_th_ on loud_th[2:0] loud_ freq loud_th_ghr[2:0] ls_vol_ctrl 67h 0000 0001 0 0 0 0 0 0 0 bal_mode ls_cvol / ls_vol_l 68h 1000 0000 cvol[7:0] ls_bal / ls_vol_r 69h 0000 0000 bal[7:0] (s) sw_gain 6ah 1000 0000 sw_gain[5:0] sw_band 6bh 0000 0011 0 0 0 0 0 sw_freq[2:0] headphone channel hp_bt_ctrl 71h 0000 0000 bt__on 0 0 00 0 00 hp_bass_gain 72h 0000 0000 0 0 0 bass_gain[4:0] (s) hp_treble_gain 73h 0000 0000 0 0 0 treble_gain[4:0] (s) hp_vol_ctrl 75h 0000 0001 bal_mode table 10: list of i2c registers (sheet 4 of 5) name addr. (hex) reset value (bin) register function and description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 37/97 stv82x6 register list 9.2 stv82x6 general control registers cut_id version identification reset software reset register description the built-in automatic standard recognition system (autostd) can be disabled by bit auto_off (when high). in this case, the software reset function (bits soft_lrestart1 and soft_lrestart2) can be used to implement the automatic standard recognition by i2c software. this is not required if the built-in automatic standard recognition system function is used (default). hp_cvol / hp_vol_l 76h 1000 0000 cvol[7:0] hp_bal / hp_vol_r 77h 0000 0000 bal[7:0] (s) beeper beeper_ctrl 79h 0000 0000 ls_beep_ on hp_beep_ on beep_mod e 0 0 0 beep_duration[1:0] beeper_tone 7ah 0111 0000 beep_freq[2:0] beep_vol[4:0] address (hex): 00h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 srs_on 0 cut_number[5:0] bit name reset function srs_on 0 identifies the stv82x6 version 0: version without srs? (stv82x6) - only st widesurround can be used 1: version with srs? (stv8226/36) - both srs? and st widesurround are available bit 6 0 reserved. cut_number[5:0] 010001 dice version identification address (hex): 02h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 sclpd_off auto_off 0 0 soft _lrst1 soft_lrst2 soft_rst table 10: list of i2c registers (sheet 5 of 5) name addr. (hex) reset value (bin) register function and description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 38/97 ctrl hardware interface control register description provides all hardware controls to drive external components (saw filter, audio switches) and additional audio decoder (dolby pro logic) via register i2s including the master and quartz clocks. bit name reset function bit7 0 reserved. sclpd_off scl pulling-down system disable 0: system is enabled 1: system is disabled auto_off 0 automatic standard recognition system disable 0: system is enabled 1: system is disabled bits[4:3] 00 reserved. soft_lrestart1 0 softreset (active hi gh) of channel 1 detectors only. soft_lrestart2 0 softreset (active high) of channel 2 detectors only. softrst 0 general softreset (active high) to reset all hardware registers except for i2c data. address (hex): 03h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 bus_expand[1:0] i2s_en sdi_en 0 mck_en sysck_en bit name reset function bit 7 0 reserved. bus_expand[1:0] 00 static control by i2c of hardware pins bus1 and bus0. i2s_en 0 when 1, the i2s hardware pin is enabled (sck, ws, sdo) sdi_en 0 when 1, the sdi input pin is enabled (switc h with st output). must be used when i2s mode is selected. bit 2 0 reserved. mck_en 0 master clock enable enables the master clock output (256.fs) to inte rface by i2s with the dolby pro logic decoder. 0: disabled. 1: enabled sysck-en 0 system clock enable enables the system clock output to provide the quartz clock required to interface with the dolby pro logic decoder. 0: disabled. 1: enabled obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 39/97 stv82x6 register list i2s i2s interface control register description proposes most used i2s standard (philips and sony ) with word select (ws) polarity programming. only master mode is supported. all interfaced chip must be set in slave mode. 9.3 analog block ana_ctrl power supply configuration control register address (hex): 04h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 0 i2s_std i2s_wspol 0 0 bit name reset function bits[7:4] 0000 reserved. i2s_std 0 i2s standard select 0: philips standard (default) 1: sony standard i2s_wspol 0 i2s word select polarity select 0: no ws inversion (default) 1: ws with polarity inversion bits[1:0] 00 reserved. address (hex): 05h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sel5v 0 00 0 00 0 bit name reset function sel5v 0 5 v analog power supply select the audio power amplifiers should be muted before changing this bit. 0: 8 v analog power supply (default). 1: 5 v analog power supply bit[6:0] 0000000 reserved obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 40/97 ana_scart scart control register note: scart i2c programming (matrixing and mute control) is maintained during standby mode before switching to standby mode, the output scart mute is recommended if the demodulated sound source (dsp_oscart) is selected by this output. this source might cause an audible plop during the digital power down. ana_ls_hp loudspeaker/subwoofer/headphone mute control address (hex): 06h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 dsp_iscart_sel[1:0] mute_osca rt2 oscart2_sel[1:0] mute_osca rt1 oscart1_sel[1:0] bit name reset function dsp_iscart _sel[1:0] 00 analog audio matrixing for mono and scart inputs (with low nois e audio switching) 00: iscart1 (default) 01: iscart2 10: iscart3 11: mono input mute_oscart2 1 0: no mute 1: x output muted oscart2_sel [1:0] 01 analog audio matrixing for scart outputs (with low noise audio switching) 00: dsp_oscart 01: iscart1 (default) 10: iscart2 11: iscart3 mute_oscart1 1 0: no mute 1: x output muted oscart1_sel [1:0] 00 00: dsp_oscart (default) 01: iscart1 10: iscart2 11: iscart3 ana_ls/hp address (hex): 07h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 hpd_in hpd_on sw_on 0 0 mute_ls mute_sw mute_hp obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 41/97 stv82x6 register list 9.4 clocking a low-jitter pll clock is integrated and can be fully reprogrammed using the registers described below. by default, the programming is defined for a 27-mhz quartz crystal frequency, which is the frequency recommended for reducing potential rf interference in the application. (see section 2.2: system clock .) however, if necessary, the pll clock can be re-programmed for other quartz crystal frequencies within a range from 23 to 30 mhz. other quartz crystal frequencies can be programmed on your demand. note: a crystal frequency change is compatible with other default i2c programming including the built-in automatic standard recognition system. pll_div pll frequency divider register bit name reset function hpd_in 0 headphone input pin status read only i2c bit that displays the hpd pin status 0: headphone is detected 1: headphone is not detected hpd_on 0 headphone detection enable 0: headphone detection is disabled 1: headphone detection is enabled. if the hp d_in bit is set, the loudspeaker and subwoofer mute is activated sw_on 0 subwoofer enable before switching on/off the subwoofer, a mute is recommended to prevent an audible plop. 0: subwoofer is disabled. headphone output is selected. 1: subwoofer is enabled. subwoofer output is selected and headphone output is in mono mode bits[4:3] 00 reserved. mute_ls mute_sw mute_hp 000 000: ls + sw + hp mono 100: not used. 001: ls + sw 101: not used. 010: ls + hp stereo 110: hp stereo only. 011: ls only 111: all muted (default) address (hex): 08h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 sdiv[2:0] fdiv[2:0] bit name reset function bits[7:6] 00 reserved. sdiv[2:0] 000 pll frequency s-divider fdiv[2:0 101 pll frequency f-divider obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 42/97 pll_md pll coarse frequency control register pll_peh pll fine frequency control register (msbs) pll_pel pll fine frequency control register (lsbs) address (hex): 09h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 000 md2[4:0] bit name reset function bits[7:5] 000 reserved. md2[4:0] 11110 pll coarse frequency control address (hex): 0ah type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 0 pe1[11:8] bit name reset function bits[7:4] 000 reserved. pe1[11:8] 0001 pll fine frequency control (4 msbs) address (hex): 0bh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 pe1[7:0] bit name reset function pe1[7:0] 11101000 pll fine frequency control (8 lsbs) obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 43/97 stv82x6 register list 9.5 demodulator demod_ctrl demodulator control register demod_stat demodulator detection status register address (hex): 0ch type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0000 am_sel demod_mode[2:0] bit name reset function bits[7:4] 0000 reserved. am_sel 0 demodulator configuration select 0: fm configuration of demodulator (default) 1: am configurat ion of demodulator demod_mode[ 2:0] 110 demodulator mode select ch1 fm ch2 fm/qpsk x00: normal fm normal x01: wide fm wide 010: normal qpsk system b/g/l/d/k 011: wide qpsk system b/g/l/d/k 110: normal qpsk system i 111: wide qpsk system i address (hex): 0dh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 qpsk_lk fm2_car fm2_sq fm1_car fm1_sq bit name reset function bit [7:5] 000 reserved. qpsk_lk 0 qpsk lock detection flag 0: not detected 1: detected fm2_car 0 channel 2 fm/am carrier detector flag 0: not detected 1: detected fm2_sq 0 channel 2 fm squelch detector flag 0: not detected 1: detected obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 44/97 note: these registers allow direct access to the demodulator signal detectors. agcc agc control for if adc fm1_car 0 channel 1 fm/am carrier detector flag 0: not detected 1: detected fm1_sq 0 channel 1 fm squelch detector flag 0: not detected 1: detected address (hex): 0eh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 agc_cmd 0 0 agc_ref[2:0] agc_cst[1:0] bit name reset function agc_cmd 0 automatic gain control command mode normally set to 0 enabling automatic mode. for l/l? standards, the agc should be switched off due to the presence of the am s ound carrier. in this case, a fixed gain value should be set using the agcs register. 0: automatic mode. agc controlled by the autostd function. (default) 1: manual/forced mode bits[6:5] 00 reserved. agc_ref[2:0] 100 this bitfield is used to defines the clipping level which adjusts the allowable proportion of samples at the input of the adc which w ill be clipped. the agc tries to ma ximize the use of the full scale range of the adc. the default setting gives a ratio of 1/256. clipping ratio clipping ratio 000: 1/16 (single carrier) 100: 1/256 (default 001: 1/32 101: 1/512 010: 1/64 110: 1/1024 011: 1/128 111: 1/2048 (multiple carriers) agc_cst[1:0] 01 agc time constant this is the time cons tant between each step of 1.25 db by the adc. step duration (ms) 00 1.33 01 2.66 10 5.33 11 10.66 bit name reset function obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 45/97 stv82x6 register list agcs agc control and status for if adc note: when agc_cmd = 0 , agc_err[4:0] can be read -- indicating the input level. it can also be written to -- presetting the agc level which will then adjust itself to the final value. when agc_cmd = 1 , the agc is off and writing to agc_err[4:0] directly controls the agc amplifier gain. reading agc_err just confirms the fixed value. dcs dc offset status for if adc address (hex): 0fh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 agc_err[4:0] sig_over sig_under bit name reset function bit 7 0 reserved. agc_err[4:0] 00000 amplifier gain control this is the gain control value of adc. t here are 31 steps of +1.25 db (see note below). 00000: 0 db gain 11110: +37.5 db gain sig_over 0 agc input signal upper threshold 0: normal signal 1: signal too large and agc is overloaded sig_under 0 agc input signal lower threshold 0: normal signal 1: signal too small and agc is underloaded when the agc is in automatic mode (agc_cmd = 0), bits sig_over and sig_under indicate if the input signal is too small/large and the ag c is under/overloaded. this is useful when setting the stv82x6 sif input level. address (hex): 10h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 dc_err[7:0] bit name reset function dc_err[7:0] 00000000 dc offset error of if adc output obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 46/97 9.6 demodulator channel 1 carfq1h, carfq1m, carfq1lchannel 1 carrier dco frequency note: carrier freq: carfq1(dec).fs/2 24 with fs = 24.576 mhz (crystal oscillator frequency independent) fir1c[0:7] channel 1 fir coefficients address (hex): 13h to 15h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 carfq1[23:16], carfq1 [15:8], carfq1[7:0] bit name reset function carfq1[13:8] ]carfq1[13:8] carfq1[7:0] 00111110 10000000 00000000 channel 1 dco carrier frequency (8 msbs) channel 1 dco carrier frequency channel 1 dco carrier frequency (8lsbs) table 11: mono carrier frequencies by system system mono carrier freq . (mhz) carfq1[23:0] (dec ) carfq1[23:0] (hex) m/n 4.5 3072000 2ee000h b/g 5.5 3754667 394aabh i 6.0 4096000 3e8000h l 6.5 4453717 43f555h d/k/k1/k2 6.5 4437333 43b555h address (hex): 15h to 1ch type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 fir1c0[7:0] to fir1c7[7:0] bitfield description fm 27 khz fm 50 khz fm 200 khz fm 350 khz fm 500 khz am fir1c0[7:0] ffh 00h 00h 02h 01h 00h fir1c1[7:0] feh feh 01h 01h 00h feh fir1c2[7:0] feh fch 01h fch 04h fdh fir1c3[7:0] 00h fdh fch 03h fah feh fir1c4[7:0] 06h 02h 08h 04h 05h 04h obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 47/97 stv82x6 register list acoeff1 channel 1 baseband pll loop filter proportional coefficient bcoeff1 channel 1 baseband pll loop filter integral coefficient & dco gain fir1c5[7:0] 0eh 0dh f6h f2h 00h 0dh fir1c6[7:0] 16h 18h f8h 06h f2h 16h fir1c7[7:0] 1bh 1fh 4ah 43h 4dh 1dh address (hex): 1dh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 acoeff1[7:0] bit name reset function acoeff1[7:0] 00100011 used to program the proportional coefficient of the baseband pll loop filter (channel 1) defines the damping factor of the loop. for values, refer to ta b l e 1 2 . address (hex): 1eh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bcoeff1[7:0] bit name reset function bcoeff1[7:0] 00010010 used to program the integral coefficient of the baseband pll loop filter and dco gain defines the bandwidth of the loop. for values, refer to ta bl e 1 2 . table 12: baseband pll loop filter adjustment (fm mode) fm mode small standard medium large a2 standard acoeff (hex) 10h 22h 2ch 2ch 10h bcoeff (hex) 1ah 12h 0ah 0ah 11h fm_dev max (khz) 62.5 125 250 500 125 dco range (khz) 96 192 384 768 192 bitfield description obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 48/97 crf1 channel 1 baseband pll demodulator offset ceth1 channel 1 fm/am carrier level threshold sqth1 channel 1 fm squelch threshold register address (hex): 1fh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 crf1[7:0] bit name reset function crf1[7:0] 00000000 channel 1 carrier recovery frequency displays the instantaneous fr equency offset of the channel 1 baseband pll demodulator. address (hex): 20h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ceth1[7:0] bit name reset function ceth1[7:0] 00100000 this register is used to compare the carrier level in the channel and the threshold value. this level is measured after the channel filter and is rela tive to the full scale reference level (0 db). this is used as part of the validat ion of an fm signal, if the carrier level is below the threshold, the signal is considered to be non-valid. ceth threshold (db) ceth threshold (db) ffh -6 10h -32 (recommended value) 80h -12 08h -38 40h -18 00h off (all carrier levels are accepted) 20h -24 (default) address (hex): 21h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sqth1[7:0] obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 49/97 stv82x6 register list caroffset1 channel 1 dco carrier offset compensation 9.7 demodulator channel 2 iagcr channel 2 internal agc reference for qpsk bit name reset function sqth1[7:0] 00111100 the squelch detector meas ures the level of high frequency noise (> 40 khz) and compares it to the threshold level (sqth). if the level is below this value, the s/n of the fm signal is considered to be acceptable. values are given for fm with standard deviation. sqth s/n (db) fah 0 77h 10 3ch 15 (default) 23h 20 19h 25 address (hex): 22h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 caroffset1[7:0] (s) bit name reset function caroffset1[7:0] 00000000 this value is used correct the carrier frequency offset of the incoming if signal. automatic frequency control in fm mode c an be implemented by registers fm_dcr and fm_dcl . a dco frequency offset (in two?s complement format) is added to the pre-programming value by autotsd in the carfq1 registers (cor responding to the standard if carrier frequency). the programmable carrier offset ranges from -192 khz to +190.5 khz with a resolution of 1.5 khz. for standard fm deviation, the value displa ys by fm_dcl can be directly loaded in caroffset1 to exactly compensate the carrier offset on channel 1 address (hex): 25h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 iagc_ref[7:0] bit name reset function iagc_ref[7:0] 10001000 sets the mean value of the internal agc, used for qpsk demodulation. the default setting corresponds to half full scale amplitude at the baseband pll input. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 50/97 iagcc channel 2 internal agc time constant for qpsk iagcs channel 2 internal agc status for qpsk carfq2h, carfq2m, carfq2lchannel 2 carrier dco frequency address (hex): 26h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 iagc_off 0 0 0 0 iagc_cst[2:0] bit name reset function iagc_off 0 agc disable 0: internal agc is active 1: internal agc is disabled bits[6:3] 0000 reserved. iagc_cst[2:0] 011 internal agc programmable step constant . these bits control the time per step (values gi ven for qpsk mode). the default value defines the optimum trade-off between fast settling time (for the fastest nicam identif ication) and the noise immunity (minimum ber degradation) step time (us) time response (ms) 000 703 128 001 352 64 010 176 32 011 88 16 100 44 8 101 22 4 110 11 2 111 5.5 0.82 address (hex): 27h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 iagc_ctrl[7:0] bit name reset function iagc_ctrl[7:0] 00000000 indicates the value of the internal agc gain control address (hex): 28h to 2ah type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 carfq2[23:16], carfq2 [15.8], carfq2[7:0] obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 51/97 stv82x6 register list fir2c[0:7] channel 2 fir coefficients bit name reset function carfq2[23:16] carfq2[15.8] carfq2[7:0] 01000100 01000000 00000000 channel 2 dco carrier frequency (8 msbs) channel 2 dco carrier frequency channel 2 dco carrier frequency (8 lsbs) see ta b l e 1 3 . table 13: stereo carrier frequencies by system system stereo carrier freq. (mhz) car fq2[23:0] (dec) carfq2[23:0] (hex) m/n a2+ 4.724212 3225062 3135e6h b/g nicam 5.85 3993600 3cf000h bg a2 5.7421875 3920000 3bd080h i nicam 6.552 4472832 444000h l nicam 5.85 3993600 3cf000h dk nicam 5.85 3993600 3cf000h dk1 a2* 6.258125 4272000 412f80h dk2 a2* 6.7421875 4602667 463b2bh dk3 a2* 5.7421875 3920000 3bd080h address (hex): 2bh to 32h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 fir2c0[7:0] to fir2c7[7:0] table 14: channel 2 fir coefficients bitfield description fm 27 khz fm 50 khz qpsk 40% qpsk100% fir2c0[7:0] ffh 00h 00h 00h fir2c1[7:0] feh feh 00h 00h fir2c2[7:0] feh fch ffh 00h fir2c3[7:0] 00h fdh 03h 00h fir2c4[7:0] 06h 02h 00h ffh fir2c5[7:0] 0eh 0dh f4h 04h fir2c6[7:0] 16h 18h 0ah 14h fir2c7[7:0] 1bh 1fh 3dh 25h obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 52/97 acoeff2 channel 2 baseband pll loop filter proportional coefficient bcoeff2 channel 2 baseband pll loop filter integral coefficient & dco gain address (hex): 33h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 acoeff2[7:0] bit name reset function acoeff2[7:0] 10010000 this value defines the loop clamping factor used to program the proportional coefficient of the baseband pll loop filter (channel 2). see ta b l e 1 5 and ta bl e 1 6 . address (hex): 34h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bcoeff2[7:0] bit name reset function bcoeff2[7:0] 10101100 this value defines the loop bandwidth used to prog ram the integral coefficient of the baseband pll loop filter and dco gain. see ta bl e 1 5 and ta bl e 1 6 . table 15: baseband pll loop filter adjustments (fm mode) fm mode small standard mid wide a2 standard acoeff (hex) 10h 22h 2ch 2ch 10h bcoeff (hex) 1ah 12h 0ah 0ah 11h fm_dev max (khz) 62.5 125 250 500 125 dco range (khz) 96 192 384 768 192 table 16: baseband pll loop filter adjustments (qpsk mode) qpsk mode small medium large extra-large acoeff (hex) 90h 90h 90h 90h bcoeff (hex) ach a3h 9ah 91h dco_dev max (khz) 2.84375 5.6875 11.375 22.75 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 53/97 stv82x6 register list scoeff channel 2 symbol tracking loop coefficients srf channel 2 symbol tracking loop frequency crf2 channel 2 baseband pll demodulator offset address (hex): 35h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 scoeff[7:0] bit name reset function scoeff[7:0] 00011100 this value is used to program the proportional and integral coefficients of the qpsk symbol tracking loop. see ta bl e 1 7 and ta bl e 1 8 . table 17: qpsk system - bg/l/dk standards (40% roll-off) extra-small small medium la rge extra-large open loop scoeff (hex) 1eh 25h 24h 26h 2ah 80h table 18: qpsk system - i standard (100% roll-off) extra-small small medium large extra-large scoeff (hex) 16h 1dh 1ch 23h 22h address (hex): 36h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 srf[7:0] bit name reset function srf[7:0] 00000000 displays in two?s complement format the frequency deviation between the incoming nicam bitstream and the quartz clocks. the maximum error is 250 ppm. address (hex): 37h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 crf2[7:0] obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 54/97 ceth2 channel 2 fm carrier level threshold sqth2 channel 2 fm squelch threshold bit name reset function crf2[7:0] 00000000 channel 2 carrier recovery frequency . displays the instantaneous frequency of fset of the channel 2 baseband pll address (hex): 38h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ceth2[7:0] bit name reset function ceth2[7:0] 00100000 this register is used to compare the carrier level in the channel and the threshold value. this level is measured after the channel filter and is re lative to the full scale reference level (0 db). this is used as part of the validation of an fm si gnal, if the carrier level is below the threshold, the signal is considered to be non-valid. ceth threshold (db) ceth threshold (db) ffh -6 10h -32 80h -12 08h -38 40h -18 00h off (all carrier levels are accepted) 20h -24 (default) address (hex): 39h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sqth2[7:0] bit name reset function sqth2[7:0] 00111100 the squelch detector m easures the level of high frequency noise (> 40 khz) and compares it to the threshold level (sqth). if the level is below this value, the s/n of the fm signal is considered to be acceptable. values are given for fm with standard deviation. sqth s/n (db) fah 0 77h 10 3ch 15 (default) 23h 20 19h 25 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 55/97 stv82x6 register list caroffset2 channel 2 dco carrier offset compensation 9.8 nicam registers nicam_ctrl nicam decoder control register address (hex): 3ah type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 caroffset2[7:0] (s) bit name reset function caroffset2 [7:0] 00000000 this value is used to correct the carrier fr equency offset of the incoming if signal. automatic frequency control in fm mode c an be implemented by registers fm_dcr and fm_dcl . a dco frequency offset (in two?s complement format) is added to the pre-programming value by autotsd in the carfq2 registers (cor responding to the standard if carrier frequency). the programmable carrier offset ranges from -192 khz to +190.5 khz with a resolution of 1.5 khz. for standard fm deviation, the value displayed by register fm_dcr can be directly loaded in in register caroffset2 to exactly compensate the carrier offset on channel 2. address (hex): 3dh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 00000dif_polectmae bit name reset function bits[7:3] 00000 reserved. dif_pol 0 0: no polarity inversion (default) 1: polarity inversion of the differential decoding ect 0 error counter timer : defines the nicam error measurement period 0: 128 ms (default) 1: 64 ms mae 0 max. allowed errors . defines the nicam error decoding for mute function. 0: 511 max (default) 1: 255 max obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 56/97 nicam_ber nicam bit error rate register nicam_stat nicam detection status register 9.9 zweiton zwt_ctrl zweiton detector control register address (hex): 3eh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 error[7:0] bit name reset function error[7:0] 00000000 nicam error counter value address (hex): 3fh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 nic_det f_mute loa cbi[3:0] nic_mute bit name reset function nic_det 0 nicam signal detect 0: nicam signal no detected 1: nicam signal detected f_mute 0 frame mute 0: no mute 1: mute due to superframe alignment loss loa 0 loss of frame alig nment word (faw) 0: no alignment lost 1: frame alignment word lost cbi[3:0] 0000 indicates the received nicam control bits nic_mute 0 indicates the nicam decoder mute address (hex): 40h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 std_mode thresh[3:0] tsctrl[1:0] obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 57/97 stv82x6 register list zwt_stat zweiton status register 9.10 sound preprocessing and selection registers fm_dcl fm dc offset left register bit name reset function bit 7 0 reserved. std_mode 0 0: german standard (default) 1: korean standard thresh[3:0] 1100 defines the threshold of the detector for pilot and tone frequencies. level (% of the mid scale) level (% of the mid scale) 0000 0 1000 50 0001 6.25 1001 56.25 0010 12.5 1010 62.5 0011 18.75 1011 68.75 0100 25 1100 (default) 75 0101 31.25 1101 81.25 0110 37.5 1110 87.5 0111 43.75 1111 93.75 tsctrl[1:0] 00 defines both the detection time and t he error probability (reliability of the detection). sample accumulation decision count time (ms) error probability 00 1024 2 256 10 -4 01 (default) 1024 3 384 10 -6 10 2048 2 512 10 -7 11 2048 3 768 10 -9 address (hex): 41h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 00000zw_detzw_stzw_dm bit name reset function bits[7:3] 00000 reserved. zw_det 0 pilot detection flag zw_st 0 stereo tone detection flag zw_dm 0 dual mono tone detection flag address (hex): 42h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 fm_dcl[7:0] obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 58/97 fm_dcr fm dc offset right register pre_fm fm prescaling register bit name reset function fm_dcl[7:0] 00000000 displays (in two?s complement format) the fm (or am) dc offset level after demodulation on channel 1 (and removed automatically). in fm mode, the dc offset value gives a direct value of the carrier frequency offset which is used to compensate the dco with the caroffset 1 value in the event of an out-of-standard offset. the range and the resolution depend upon the fm bandwidth programmed defined in register bcoeff1. see ta bl e 1 9 . address (hex): 43h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 fm_dcr[7:0] bit name reset function fm_dcr[7:0] 00000000 displays (in two?s complement format) the fm (or am) dc offset level after demodulation on channel 2 (and removed automatically). in fm mode, the dc offset value gives a direct value of the carrier frequency offset which is used to compensate the dco with the caroffset 2 value in the event of an out-of-standard offset. the range and the resolution depend upon the fm bandwidth programmed defined in register bcoeff2. see ta bl e 1 9 . table 19: fm_dcl/r range and resolution fm mode range (khz) resolution (khz) small 96 0.750 standard & a2 standard 192 1.5 medium 384 3 large 768 6 address (hex): 44h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 fm_prescale[5:0] bit name reset function bits[7:6] 0 reserved. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 59/97 stv82x6 register list pre_nicam nicam prescaling register pre_aux scart prescaling register fm_prescale [5:0] 000110 -6 to + 24 db fm (or am) prescaling to norma lize the fm (or am) demodulated signal level before audio processing. auto level control can be impl emented by i2c software using the peak level detector. (default value = +6 db) g (db) g (db) 011000 +24 111110 -2 010111 +23 111101 -3 010110 +22 111100 -4 010101 +21 111011 -5 010100 +20 111010 -6 etc. address (hex): 45h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 nicam_prescale[5:0] bit name reset function bits[7:6] 00 reserved. nicam_ prescale[5:0] 001101 -6 to + 24 db nicam prescaling to normalize the nicam demodulated signal level before audio processing. auto level control can be implemented by i2c software using the peak level detector. (default value = +13 db) g (db) g (db) 011000 +24 111110 -2 010111 +23 111101 -3 010110 +22 111100 -4 010101 +21 111011 -5 010100 +20 111010 -6 etc. address (hex): 46h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 i2s_prescale[3:0] sc art_prescale[3:0] bit name reset function obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 60/97 ch_ctrl channel control register bit name reset function i2s_prescale [3:0] 0000 -6 to + 6db i2s input prescaling to normalize the incoming audio signal before audio processing. auto level control can be implemented by i2c software using the peak level detector. these bits are used to adjust the correspondi ng incoming signal level before audio processing. g (db) g (db) 0110 +6 1111 -1 0101 +5 1110 -2 0100 +4 1101 -3 0011 +3 1100 -4 0010 +2 1011 -5 0001 +1 1010 -6 0000 (default) 0 scart_prescal e[3:0] 0000 -6 to + 6db scart input prescaling to normalize the incoming audio signal before audio processing. auto level control can be implemented by i2c software using the peak level detector. these bits are used to adjust the correspondi ng incoming signal level before audio processing. g (db) g (db) 0110 +6 1111 -1 0101 +5 1110 -2 0100 +4 1101 -3 0011 +3 1100 -4 0010 +2 1011 -5 0001 +1 1010 -6 0000 (default) 0 address (hex): 47h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 mute_d012 mute_d12 nic_dmx nicdph_off fm_dmx[1:0] fmdph_off fmdph_sw bit name reset function mute_d012 0 0: ls/hp/sc/i2s channel unmuted 1: if demod source is selected as output channel by ch_sel and ch_lang, then mute_ls/mute_hp /mute_sc signal are set (ls/hp/sc/i2s channel mute) mute_d12 0 0: ls/hp/sc/i2s channel unmuted 1: if demod_1 or demod_2 source is selected as output channel by ch_sel and ch_lang, then mute_ls/mute_hp/mute_ sc signal are set (ls/hp/sc/i2s channel mute) nic_dmx 0 when 1, reverse left/right channel to take into account the case where the mono signal would be carried on the right channel. nicdph_off 0 0: nicam de-emphasis (default) 1: bypass nicam de-emphasis fm_dmx[1:0] 00 fm stereo dematrix dematrix standard 00 (default) l=ch1 , r=ch2 no matrixing 01 l=ch1+ch2, r=ch1-ch2 kor. zweiton (a2+) & radio 10 l=2ch1-ch2, r=ch2 german zweiton (a2, a2*) 11 l=(ch1+ch2)/2, r=(ch1 +ch2)/2 stereo to mono obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 61/97 stv82x6 register list ch_mx channel matrix register fmdph_off 0 0: fm de-emphasis (default) 1: bypass fm de-emphasis fmdph_sw 0 0: 50 s fm de-emphasis (default) 1: 75 s fm de-emphasis address (hex): 48h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 i2s_mx[1:0] sc_mx[1:0] demod_mx[3:0] bit name reset function i2s_mx[1:0] 00 i2s matrixing. programmable values are listed in ta bl e 2 0 . sc_mx[1:0] 00 scart matrixing. prog rammable values are listed in ta bl e 2 0 . demod_mx[3:0] 0000 demodulator matrixing. programmable values are listed in ta bl e 2 1 . table 20: scart and i2s matrixing sc_0/i2s_0 sc_1/i2s_1 left right left right 00 ch_l ch_r 0 01 ch_r ch_l 0 10 ch_l ch_r 11 ch_r ch_l table 21: demodulator matrixing demod_0 demod_1 demod_2 leftrightleftrightleft 0x00 fm_l 0 0 0x01 fm_l fm_r 0 0 0x10 nic_l nic_r 0 0 0x11 nic_l 0 0 1000 fm_l fm_r 0 1001 nic_l nic_r 0 1010 fm_l nic_l nic_r 0 bit name reset function obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 62/97 ch_sel channel source selection register note: a mute of the corresponding audio output is recommended before switching between demodulated sound and scart source. any audio discontinuity might create annoying audible plops. ch_lang channel language selection register note: 1 refer to ta bl e 4 and ta b l e 5 for selecting channel language, sound and system values. 1011 fm_l nic_l nic_r 11xx fm_l nic_l 0 address (hex): 49h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 i2s_sel[1:0] sc_sel[1:0] hp_sel[1:0] ls_sel[1:0] bit name reset function i2s_sel[1:0] 00 source channel selection . 0x: demodulated sound (default) 10: scart 11: i2s sc_sel[1:0] 00 hp_sel[1:0] 00 ls_sel[1:0] 00 address (hex): 4ah type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 i2s_lang[1:0] sc_lang[1:0] hp_lang[1:0] ls_lang[1:0] bit name reset function i2s_lang[1:0] 00 channel language selection . see ta bl e 4 and ta bl e 5 . 00: not to be used. 01: mono a 10: mono b 11: mono c sc_lang[1:0] 00 hp_lang[1:0] 00 ls_lang[1:0] 00 table 21: demodulator matrixing (continued) demod_0 demod_1 demod_2 leftrightleftrightleft obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 63/97 stv82x6 register list 2 a mute of the corresponding audio output is recommended before changing the language. any audio discontinuity might create annoying audible plop. peak_det_ctrl peak level detector control register peak_det_statl peak level detector status register address (hex): 4bh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 000000 pd_sel[1:0] bit name reset function bits[7:2] 000000 reserved. pd_sel[1:0] 00 peak level detector source selection 00: fm 10: scart 01: nicam 11: i2s address (hex): 4ch type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 peak_level_left[7:0] bit name reset function peak_level_ left[7:0] 00000000 displays the absolute peak level of the audio source select ed. the measured value is updated continuously every 64 ms. the range varies linearly from the full scale (0 db) down to 1/ 256 of the full scale (-48 db). in am/fm mono mode, only the peak_level_left[7 :0] value must be taken into account. in fm mono mode, the audio peak level range depends upon the programmed fm bandwidth. the unique difference is that t he measurement is done after so und pre-processing (dc offset removal, prescaling, de-emphasis and dematrixing). in fm stereo mode, the maximum value may be used to check if the incoming signal level is correctly adjusted by the prescaling factor or if there are no fm overmodulation problems (clipping). programmable values are listed in ta bl e 1 9 . the difference between the peak_level_left[7:0] and peak_level_right[7:0] values may be calculated by the microcontroller to identify mono or stereo mode from an unknown source (scart or i2s). obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 64/97 peak_det_statr peak level detector status register 9.11 automatic standard recognition auto_ctrl automatic standard recognition control register address (hex): 4dh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 peak_level_right[7:0] bit name reset function peak_level_ right[7:0] 00000000 displays the absolute peak level of the audio source select ed. the measured value is updated continuously every 64 ms. the range varies linearly from the full scale (0 db) down to 1/256 of the full scale (-48 db). for more information, refer to register peak_det_statl . address (hex): 50h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 irq single_shot dk_dev[1:0] ldk_sw bit name reset function bits[7:5] 000 reserved. irq 0 this flag (output on irq pin) is set to on by the autostd w hen the standard recognition status has changed. the external microprocessor will detec t this signal and will run the osd procedure. this procedure must first reset via i2c the ir q flag and then read the detection status in the registers (nicam_stat, zwt_stat, auto_stat and ch_mx) single_shot 0 single shot mode selection 0: single shot mode is not selected 1: single shot mode is selected 1 1. single_shot mode can be used before disabling the automatic standard recognition (autostd) to pre-program demodulator registers in a defined standard and reduce i2c programming in manual mode dk_dev[1:0] 00 selects fm deviation conf iguration to take into account of overmodulation in dk_nicam standard. 00: fm 50 khz (default) 10: fm 350 khz 01: fm 200 khz 11: fm 500 khz ldk_sw 1 makes exclusive the auto sear ch of dk/k1/k2/k3 and l/l? standard 0: dk/k1/k2/k3 standard auto-search / l/l? disabled 1: l/l? standard auto-search / dk/k1/k2/k3 disabled obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 65/97 stv82x6 register list note: only standard deviation fm 50k khz is compatible with other d/k1/k2/k3 standards in automatic standard recognition search mode. it has to be deselected when programs with larger fm deviation are broadcast (reserved only for d/k-mono or d/k nicam standard). fm deviation superior to 350 khz will degrade strongly nicam reception due to overlapping of fm and qpsk if spectrum in dk-nicam standard. l/l? and dk/k1/k2/k3 standard can be discriminated in automatic standard recognition search mode because the same frequency is used for the mono if carrier. auto_sckm auto standard check mono register note: autostd is off when all mono standards are disabled. auto_sckst auto standard check stereo register address (hex): 51h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 0 ldk_sck i_sck bg_sck mn_sck bit name reset function bits[7:4] 0000 reserved. ldk_sck 1 l/l? or d/k mono standard enable 0: disabled 1: enabled i_sck 1 i mono standard enable 0: disabled 1: enabled bg_sck 1 b/g mono standard enable 0: disabled 1: enabled mn_sck 1 m/n mono standard enable 0: disabled 1: enabled address (hex): 52h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ldk_zwt3 ldk_zwt2 ldk_swt1 ldk_ nic i_nic bg_zwt bg_nic mn_zwt obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 66/97 note: stereo standard covers all transmission modes (stereo or multi-language) of the nicam or zweiton (a2, a2* or a2+) system. auto_timer detection time out register bit name reset function ldk_zwt3 0 d/k3 zweiton (a2*) stereo standard enable 0: disabled 1: enabled ldk_zwt2 0 d/k2 zweiton (a2*) stereo standard enable 0: disabled 1: enabled ldk_zwt1 0 d/k1 zweiton (a2*) stereo standard enable 0: disabled 1: enabled ldk_nic 1 d/k nicam stereo standard enable 0: disabled 1: enabled i_nic 1 i nicam stereo standard enable 0: disabled 1: enabled bg_zwt 1 b/g zweiton (a2) standard enable 0: disabled 1: enabled bg_nic 1 b/g nicam standard enable 0: disabled 1: enabled mn_zwt 1 m/n zweiton (a2+) standard enable 0: disabled 1: enabled address (hex): 53h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 fm_time[1:0] nicam_time [2:0] zweiton_time[2:0] bit name reset function fm_time[1:0] 10 fm detection time-out 00: 16 ms 10: 48 ms (default) 01: 32 ms 11: 64 ms nicam_time[2:0] 100 nicam detection time-out 000: 96 ms 100: 224 ms (default) 001: 128 ms 101: 256 ms 010: 160 ms 110: 288 ms 011: 192 ms 111: 320 ms obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 67/97 stv82x6 register list note: the time-out default value is optimum and does not normally need to be changed. auto_stat detection standard status register zweiton_time[ 2:0] 100 zweiton detection time-out 000: 256 ms 100: 1280 ms (default) 001: 512 ms 101: 1536 ms 010: 768 ms 110: 1792 ms 011: 1024 ms 111: 2040 ms address (hex): 54h type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 st_id stereo_sta te mono_state auto_on stereo_sid[1:0] mono_sid[1:0] bit name reset function st_id 0 stereo mode detection flag activated when a stereo standard coming from the demodulator selected on loudspeaker output. stereo transmission modes are: - zweiton stereo (zwt_det&st&dm = 110, indifferently german or korean standard) - nicam stereo with backup (cbi = 1000) - nicam stereo with no backup (cbi = 0000) the stereo flag is also output on st pin to cont rol an external indicator (an led, for instance) stereo_state 0 when autostd is on and a standard has been det ected, the fsm has two ?stable states?. these flags indicate whether the fsm is in the stat e ?mono-det? (mono standard detected) or ?stereo-det? (stereo standard detected). if at least one stereo standard is enabl ed, the ?mono-det? state is only transitory. mono_state 0 auto_on 0 automatic standard recognition system status 0: automatic standard rec ognition system is off 1: automatic standard recognition system is on stereo_sid[1:0] 00 identification of the detec ted tv sound standard. see ta bl e 2 2 . mono_sid[1:0] 00 table 22: tv sound standards system mono sound (mhz) mono_sid [1:0] ldk_sw dk_dev [1:0] stereo sound (mhz) stereo_sid [1:0] m/n 4.5 (fm 27k) 00 x xx 4.724 (zweiton a2+) 00 b/g 5.5 (fm 50k) 01 x xx 5.85 (nicam 40%) 00 x xx 5.742 (zweiton a2) 01 i 6.0 (fm 50k) 10 x xx 6.552 (nicam 100%) 00 bit name reset function obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 68/97 9.12 smart volume control svc_sel svc selection for loudspeaker/headphone register svc_ctrl svc control register l6.5 (am) 111 1 xx 5.85 (nicam 40%) 00 d/k 6.5 (fm 50k) 0 00 5.85 (nicam 40%) 00 6.5 (fm 200k) 01 6.5 (fm 350k) 10 6.5 (fm 500k) 11 d/k1/k2/ k3 6.5 (fm 50k) 0 xx 5.85 (nicam 40%) 00 0 xx 6.258 (zweiton a2*) 01 0 xx 6.742 (zweiton a2*) 10 0 xx 5.742 (zweiton a2*) 11 address (hex): 59h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0000000svc_sw bit name reset function bit[7:1] 0000000 reserved svc_sw 0 smart volume control selection 0: svc selection on loudspeaker path 1: svc selection on headphone path address (hex): 5ah type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 svc_on svc_time[1:0] svc_ref[4:0] bit name reset function svc_on 0 smart volume control mode select 0: prescaling (prevents internal clipping) 1: automatic level regulation (automatica lly regulates the selected sound source) table 22: tv sound standards system mono sound (mhz) mono_sid [1:0] ldk_sw dk_dev [1:0] stereo sound (mhz) stereo_sid [1:0] obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 69/97 stv82x6 register list note: 1 when the svc is in automatic mode (svc_on = 1), internal clipping may occur with a high reference level (ref_level = -2.5 or -6 db). the maximum recommended value is -8.5 db. 2 a mute of the corresponding audio output is recommended before switching on/off. a gain discontinuity may create annoying audible plops. svc_time[1:0] 10 defines the constant time of the gain loop. time constant for 6 db amplification 00: 16 s (default) 01: 8 s 10: 4 s 11: 2 s svc_ref[4:0] 00000 smart volume control reference level select if svc_on = 0, this value defines the pr escaling gain ranging from -30 db to +15.5 db. if svc_on = 1, this value defines the output refe rence level of the regulation ranging from -2.5 db down to -30 db. the svc output level must be adjusted to avoid internal clipping due to post- processing with amplif ication, i.e. st/srs ? surround sound (+9 db max), equalizer or bass/ treble (+12 db max) and loudness (+6 db max). programmable values are listed in ta b l e 2 3 . table 23: svc bit values svc_on = 0 svc_on = 1 svc_ref[4:0] ref_level (db) svc_ref[4:0] ref_level (db) > 00101 reserved > 00101 reserved 00101 +15.5 00101 -12 00100 +12 00100 -12 00011 +9.5 00011 -12 00010 6 00010 -12 00001 3.5 00001 -12 00000 (default) 0 00000 -12 11111 -2.5 11111 1 -2.5 11110 -6 11110 1 -6 11101 -8.5 11101 -8.5 11100 -12 11100 -12 11011 -14.5 11011 -14.5 11010 -18 11010 -18 11001 -20.5 11001 -20.5 11000 -24 11000 -24 10111 -26.5 10111 -26.5 10110 -30 10110 -30 <10110 reserved < 10110 reserved bit name reset function obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 70/97 9.13 surround ls_srd_ctrl loudspeaker surround control register ls_sts_gain loudspeaker st widesurround gain register address (hex): 5bh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 srd_on 0 0 0 0 srd_sel srd_stereo sts_mode bit name reset function srd_on 0 surround sound enable 0: surround sound is disabled 1: surround sound is enabled bits[6:3] 0000 reserved srd_sel 0 surround sound select 0: st widesurround sound (default) 1: srs? surround sound. this option is only available if the srs_on bit in register cut_id is set. (stv8226/36 only) srd_stereo 0 surround sound stereo mode 0: surround sound in mono mode (default) 1: surround sound in stereo mode sts_mode 0 st widesurround sound mode selection for stereo source only the st_id bit in register auto_stat must be set. 0: st widesurround sound movie mode (default) 1: st widesurround sound music mode address (hex): 5ch type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sts_gain[7:0] bit name reset function sts_gain[7:0] 10000000 defines the st widesu rround sound component gain in linear scale. level (%) level (%) 1000 0000 (default) 100% 0000 0100 3.1% 0111 1111 99.2% 0000 0011 2.3% 0111 1110 98.4% 0000 0010 1.6% 0111 1101 97.6% 0000 0001 0.8% ........ 0000 0000 0% obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 71/97 stv82x6 register list ls_sts_freq loudspeaker st widesurround sound frequency ls_srs_space loudspeaker srs? surround sound space effect address (hex): 5dh type: r bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 bass_freq[1:0] medium_freq[1:0] treble_freq[1:0] bit name reset function bits[7:6] 00 reserved. bass_freq[1:0] 01 defines the bass frequency effect for st widesurround sound. programmable values are listed in ta bl e 2 4 . medium_freq[ 1:0] 01 defines the medium frequency effect for st widesurround sound in movie or mono mode (no effect in music mode). programmable values are listed in ta bl e 2 4 . treble_freq[ 1:0] 01 defines the treble frequency effect for st wi desurround sound in movie or mono mode (no effect in music mode). programmable values are listed in ta b l e 2 4 . table 24: phase shifter center frequencies phase shifter center frequency bass_freq[1:0] medium_freq [1:0] treble_freq[1:0] 00 40 hz 202 hz 2 khz 01 (default) 90 hz 416 hz 4 khz 10 120 hz 500 hz 5 khz 11 160 hz 588 hz 6 khz address (hex): 5eh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 srs_space[7:0] bit name reset function srs_space[7:0] 10000000 defines the gain of t he srs? surround component (in linear scale). level (%) level (%) 1000 0000 (default) 100% 0000 0100 3.1% 0111 1111 99.2% 0000 0011 2.3% 0111 1110 98.4% 0000 0010 1.6% 0111 1101 97.6% 0000 0001 0.8% ........ 0000 0000 0% obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 72/97 ls_srs_center loudspeaker srs ? surround sound center effect 9.14 5- band equalizer ls_eq_ctrl loudspeaker equalizer control register address (hex): 5fh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 srs_center[7:0] bit name reset function srs_center [7:0] 10000000 defines the gain of the srs? c enter component (in linear scale). level (%) level (%) 1000 0000 (default) 100% 0000 0100 3.1% 0111 1111 99.2% 0000 0011 2.3% 0111 1110 98.4% 0000 0010 1.6% 0111 1101 97.6% 0000 0001 0.8% ........ 0000 0000 0% address (hex): 60h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 eq_on0000000 bit name reset function eq_on 0 5-band equalizer enable 0: 5-band equalizer is disabled 1: 5-band equalizer is enabled (default) bits[6:0] 000000 reserved. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 73/97 stv82x6 register list ls_eq_band[1:5] loudspeaker equalizer gain address (hex): 61h to 65h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 eq_band1_gain[4:0] (s) 0 0 0 eq_band2_gain[4:0] (s) 0 0 0 eq_band3_gain[4:0] (s) 0 0 0 eq_band4_gain[4:0] (s) 0 0 0 eq_band5_gain[4:0] (s) bit name reset function bits[7:5] 000 reserved. eq_band1_gain[4:0] eq_band2_gain[4:0] eq_band3_gain[4:0] eq_band4_gain[4:0] eq_band5_gain[4:0] 00000 00000 00000 00000 00000 band gain adjustment within a range from -12 db to +12 db in steps of 1 db. band1 = bass (centered 100 hz) band2 = bass-medium (centered 330 hz) band3 = medium (centered 1 khz) band4 = treble-medium (centered 3.3 khz band5 = treble (centered 6.6 khz) table 25: loudspeaker/headphone equalizer gain values value gain g (db) 01100 +12 01011 +11 01010 +10 ................ ..... 00000 (default) 0 ................ ..... 10110 -10 10101 -11 10100 -12 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 74/97 9.15 loudness/bass & treble ls_loud loudspeaker loudness control register hp_bt_ctrl headphone bass/treble control address (hex): 66h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 loud_on loud_th[2:0] loud_freq loud_ghr[2:0] bit name reset function loud_on 0 loudness enable 0: loudness disabled 1: loudness enabled loud_th[2:0] 000 loudness threshold programmable values are listed in ta b l e 2 6 . loud_freq 0 bass cut-off frequency select 0: 40 hz bass cut-off frequency (normal mode) 1: 120 hz bass cut-off frequency (bass amplified mode) loud_ghr[2:0] 010 loudness maximum treble gain programmable values are listed in ta b l e 2 6 . table 26: loudness control values bitfield value threshold (db) loud_th[2:0] max. treble gain (db) loud_ghr[2:0] 000 0 (default) 0 001 -6 3 010 -12 6 (default) 011 -18 9 100 -24 12 101 -30 15 110 -36 18 111 -42 reserved address (hex): 71h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bt_on0000000 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 75/97 stv82x6 register list hp_bass_gain headphone bass gain hp_treble_gain headphone treble gain bit name reset function bt_on 0 headphone bass/treble enable 0: headphone bass/treble disabled 1: headphone bass/treble enabled bit [6:0] 0 reserved. address (hex): 72h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 bass_gain[4:0] bit name reset function bits[7:5] 000 reserved bass_gain[4:0] 00000 gain tuning of head phone bass frequency gain may be programmed within a range between +12 db and -12 db in steps of 1 db. programmable values are listed in ta b l e 2 5 . address (hex): 73h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 treble_gain[4:0] bit name reset function bits[7:5] 000 reserved treble_gain [4:0] 00000 gain tuning of headphone treble frequency gain may be programmed within a range between +12 db and -12 db in steps of 1 db. programmable values are listed in ta b l e 2 5 . obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 76/97 9.16 volume/balance control registers ls_vol_ctrl loudspeaker volume control register hp_vol_ctrl headphone volume control register ls_cvol loudspeaker common volume control register ls_vol_l loudspeaker left volume control register address (hex): 67h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0000000bal_mode bit name reset function bits[7:1] 000000 reserved. bal_mode 1 0: independent mode. 1: differential mode (default) address (hex): 75h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0000000bal_mode bit name reset function bits[7:1] 000000 reserved. bal_mode 1 0: independent mode. 1: differential mode (default) address (hex): 68h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 cvol[7:0] / vol_l[7:0] bit name reset function cvol[7:0] 00000000 loudspeaker common volume volume may be programmed within a range between 0 db and -96 db in steps of 0.375 db. programmable values are listed in ta bl e 2 7 . obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 77/97 stv82x6 register list hp_cvol headphone common volume control register hp_vol_l headphone left volume control register vol_l[7:0] 00000000 loudspeaker left volume volume may be programmed within a range between 0 db and -96 db in steps of 0.375 db. programmable values are listed in ta bl e 2 7 . address (hex): 76h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 cvol[7:0] / vol_l[7:0] bit name reset function cvol[7:0] 00000000 headphone common volume volume may be programmed within a range between 0 db and -96 db in steps of 0.375 db. programmable values are listed in ta bl e 2 7 . vol_l[7:0] 00000000 headphone left volume volume may be programmed within a range between 0 db and -96 db in steps of 0.375 db. programmable values are listed in ta bl e 2 7 . table 27: common or left volume control values register value volume level (db) 1111 1111 0 (1 v rms ) 1111 1110 -0.375 1111 1101 -0.75 ................ ..... 1000 0000 (default) -48 ................ ..... 0000 0010 -94.50 0000 0001 -95.25 0000 0000 -95.625 bit name reset function obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 78/97 ls_bal loudspeaker balance control register ls_vol_r loudspeaker right volume control register hp_bal headphone balance control register hp_vol_r headphone right volume control register address (hex): 69h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bal[7:0] / vol_r[7:0] bit name reset function bal[7:0] 00000000 loudspeaker differential balance in differential mode, the balance may be prog rammed in steps of 0.75 db. programmable values are listed in ta bl e 2 8 . vol_r[7:0] 00000000 loudspeaker right volume control in independent mode, the volume may be programmed within a range between 0 db and -96 db in steps of 0.375 db. programmable values are listed in ta bl e 2 9 . address (hex): 77h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bal[7:0] / vol_r[7:0] bit name reset function bal[7:0] 00000000 headphone differ ential balance in differential mode, the balance may be prog rammed in steps of 0.75 db. programmable values are listed in ta bl e 2 8 . vol_r[7:0] 00000000 headphone right volume control in independent mode, the volume may be programmed within a range between 0 db and -96 db in steps of 0.375 db. programmable values are listed in ta bl e 2 9 . table 28: differential balance control values register value left/common level right/common level 0111 1111 (7fh) -95.25 db 0.78% 0 db 100% 0111 1110 -94.50 db 0.56% 0 db 100% 0111 1101 -93.75 db 2.34% 0 db 100% ................ ..... ..... 0000 0000 (default) 0 db 100% 0 db 100% ................ ..... ..... obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 79/97 stv82x6 register list 9.17 subwoofer sw_gain subwoofer gain 1000 0010 0 db 100% -94.50 db 1.56% 1000 0001 0 db 100% -95.25 db 0.78% 1000 0000 (80h) 0 db 100% -96.00 db 0.00% table 29: right/left volume control values register value volume level (db) 1111 1111 0 (1 v rms ) 1111 1110 -0.375 1111 1101 -0.75 ................ ..... 1000 0000 (default) -48 ................ ..... 0000 0010 -94.50 0000 0001 -95.25 0000 0000 -95.625 table 28: differential balance control values register value left/common level right/common level address (hex): 6ah type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sw_gain[7:0] bit name reset function sw_gain[7:0] 10000000 subwoofer gain gain may be programmed within a range between 0 db and -96 db in steps of 0.375 db. programmable values are listed in ta bl e 2 7 . obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) register list stv82x6 80/97 sw_band subwoofer bandwidth control 9.18 beeper beeper_ctrl beeper control address (hex): 6bh type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0 0 0 0 sw_freq[2:0] bit name reset function bits[7:3] 00000 reserved. sw_freq[2:0] 011 cut-off frequency tuning fr om 50 hz to 400 hz in steps of 50 hz 000: 50 hz 100: 250 hz 001: 100 hz 101: 300 hz 010: 150 hz 110: 350 hz 011: 200 hz (default) 111: 400 hz address (hex): 79h type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ls_beep_on hp_beep_on beep_mode 0 0 0 beep_duration[1:0] bit name reset function ls_beep_on 0 loudspeaker beeper enable 0: loudspeaker beeper muted (default) 1: loudspeaker beeper enabled (start pulse and automatic reset in pulse mode) hp_beep_on 0 headphone beeper enable 0: headphone beeper muted (default) 1: headphone beeper enabled (start pulse and automatic reset in pulse mode) beep_mode 0 beeper mode select 0: pulse mode (for beep applications - default) 1: continuous mode (for alarm application)s bit[4:0] 000 reserved. beep_duration[ 1:0] 00 defines the duration of the beeper (for pulse mode only). 00: 0.128 s 01: 0.256 s. 10: 0.512 s. 11: 1.024 s. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 81/97 stv82x6 register list beeper_tone beeper tone control address (hex): 7ah type: r/w bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 beep_freq[2:0] beep_vol[4:0] bit name reset function beep_freq[2:0] 011 defines the frequency of the beeper tone from 62.5 hz to 8 khz in octaves 000: 62.5 hz 100: 1 khz 001: 125 hz 101: 2 khz 010: 250 hz 110: 4 khz 011: 500 hz (default) 111: 8 khz beep_vol[4:0] 10000 defines the beeper volume from 0 to -93 db in steps of 3 db. 11111: 0 db (1 v rms )... 11110: -3 db 00011: -84 db 11101: -6 db 00010: -87 db ... 00001: -90 db 10000: -48 db (default) 00000: -93 db obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) input/output groups stv82x6 82/97 10 input/output groups pin numbers apply to sdip package only. vddh 5k gndif vrefif 1 sif vddh 500 gndif 2 vtop 160 vddif vddh 6k gndif 3 vrefif 30k bgap(1.2v) vddh 400 gndif 6 monoin 22k vrefif vdda vddh 300 gnda 8 ao1r 2k 19 ao2l 20 ao2r 7 ao1l vddh gnda vddh gnda 27 lsr 2k 28 sw 29 hpl 26 lsl vddh gnda 30 hpr obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 83/97 stv82x6 input/output groups vddh gnda 11 ai1l 12 ai1r gnda 15 ai2l 16 ai2r 23 ai3l 24 ai3r 40k 90k 47k 82k vddh gnda 13 vmc1 200 bgap 6k 30k (1.2v) vddh 6k gnda 14 vmc2 30k bgap (1.2v) vddh 3k gnda 15k 22 vrefa bgap (1.2v) vddh gnda 25 bgap 10k band-gap=1.2v gnda 76 9 vddc bgap (1.2v) obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) input/output groups stv82x6 84/97 vddh vddc vddif gnda gndif gndc gnds 18 21 4 9 5 10 31 17 vdda 76 17 vdda gnda 18 bgap (1.2v) 1.2k 8k bgap (1.2v) 40 vdd1 47 36 reg 41 48 vdd2 gnd1 gnd2 gnd1 32 hpd 33 37 adr reset gnd2 50 sdo 51 st 52 ws 53 sck 54 bus1 55 bus0 56 irq vdd2 6 gnd1 39 mck vdd1 6 gnd1 38 sysck vdd1 3 gnd1 34 scl 12 35 sda obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 85/97 stv82x6 input/output groups 44 xto gndp 43 xti vddp obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) electrical characteristics stv82x6 86/97 11 electrical characteristics a 10 k ? load is applied to all outputs. 11.1 absolute maximum ratings note: analog supply voltages (v ddif , v ddc and v dda ) are regulated by internal circuits. for more information, refer to section 7.1: supply voltages . 11.2 thermal data 11.3 supply test conditions: t oper = 25 c, v ddh = 8 v, v dda is supplied by 8 v via 330 ? , v ddif is connected to v ddc and is supplied by 5 v via 22 ? and dv dd (v dd1 , v dd2 and v ddp ) is supplied by 5 v via an external ballast transistor. for more information, refer to figure 4 on page 7 . symbol parameter value units dv dd digital supply voltage (v dd1 , v dd2 , v ddp ) 4.6 v hv dd analog supply high voltage (v ddh ) 9.5 v v esd capacitor 100 pf discharged via 1.5 k ? serial resistor (human body model) 4 kv t oper operating ambient temperature 0, +70 c t stg storage temperature -55 to +150 c symbol parameter value units r thja junction-to-ambient thermal resistance sdip56 tqfp80 40 42 c/w symbol parameter test condi tions min. typ. max. units dv dd digital supply voltage (v dd1 , v dd2 , v ddp ) 3.0 3.3 3.6 v hv dd analog supply high voltage (v ddh ) 7.6 8.0 8.4 v av dd analog supply voltage (v ddif , v ddc , v dda ) 3.0 3.3 3.6 v i vdd v dd current consumption (v dd1 , v dd2 , v ddp ) 130 160 190 ma i vddif i vddc v ddif current consumption (v ddif , v ddc ) 60 75 85 ma i vdda v dda current consumption 71218ma i vddh v ddh current consumption 5.0 v 15 ma 8.0 v 15 25 35 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 87/97 stv82x6 electrical characteristics 11.4 crystal recommendations 11.5 analog sound if si gnal recommendations symbol parameter min. typ. max. units f p crystal parallel resonance frequenc y (at 22 pf load capacitor) 27 mhz df/f p frequency tolerance at 25 c -50 +50 ppm df/f t frequency stability versus temperature within a range from 0 to 70 c -50 +50 ppm c1 motional capacitor 8 ff r s serial resistance 50 ? c s shunt capacitance 7pf symbol parameter test cond itions min. typ. max. units f sif sif carrier frequency 48mhz r insif sif input resistance 4.567.5k ? dc insif sif input dc level 1.47 v c insif sif input capacitance 15 pf fm carrier vsif fm sif input level for fm carrier 0.02 1.6 v pp dev fm fm deviation fm50k (standard) 15 50 125 khz fm200k (dk only) 200 fm350k (dk only) 350 fm500k (dk mono only) 500 dfsif fm sif carrier accuracy for fm standard (fm50k) 1 5 khz shifted standard (fm50k with dco compensation) 120 khz r fm1/fm2 carrier ratio fm1/fm2 for a2 system 7db r fm/qpsk carrier ratio fm/qpsk for nicam system 13 db am carrier vsif am sif input level for am carrier (unmodulated) 0.04 0.8 v pp dev am modulation depth for am 0 100 % dfsif am sif carrier accuracy for am 1 5 khz r am/qpsk am/qpsk carrier ratio for nicam system 17 db obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) electrical characteristics stv82x6 88/97 11.6 sif to ls/hp/scart path characteristics 11.7 scart to scart anal og path characteristics symbol parameter test conditions min. typ. max. units fm demodulation band fm frequency response 20hz - 15khz -1.5 +1.5 db snr fm signal to noise rms unweighted, 20hz-15khz, standard b/g 50 khz fm deviation,1khz ls output 0.7 v rms 70 db thd fm total harmonic distortion 0.1 % sep fm stereo channel separation rms standard b/g stereo a2, 50 khz fm deviation, 1 khz 45 db xtalk fm dual channel crosstalk rms standard b/g dual mono a2, 50 khz fm deviation, 1 khz 80 db nicam demodulation band nic frequency response 20hz - 15khz -1.0 +1.0 db snr nic signal to noise rms unweighted, 20hz-15khz, standard b/g mono nicam,1 khz ls output 0.7 v rms 72 db thd nic total harmonic distortion 0.1 % sep nic stereo channel separation rms standard b/g stereo nicam, 1 khz 80 db xtalk nic dual channel crosstalk rms standard b/g dual mono nicam, 1 khz 80 db am demodulation band am frequency response 20 hz - 15 khz -1.0 +1.0 db snr am signal to noise rms unweighted 2 0hz-15 khz, standard l, 54% am depth, 1 khz ls output 0.7 v rms 50 db thd am total harmonic distortion 0.6 % symbol parameter test conditions min. typ. max. units analog-to-analog (through mode) r inscart scart input resistance 24 30 40 k ? r outscart output resistance for scarts 250 300 450 ? vdc inscart scart input dc level 2.55 v vdc outscart scart output dc level vddh = 5 v vddh = 8 v 2.20 3.40 v clipping thd v in = 2 v rms at 1 khz for vddh = 8 v 0.1 0.5 % thd total harmonic distortion v in = 1.00 v rms at 1 khz for vddh = 5 v v in = 1.75 v rms at 1 khz for vddh = 8 v 0.0125 0.0125 0.03 0.05 % obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 89/97 stv82x6 electrical characteristics 11.8 scart to i2s output path (via adc) characteristics 11.9 monoin to adc and i2s ou tput path characteristics 11.10 i2s to ls/hp/sw path characteristics snr signal to noise ratio 20 to 20 khz bandwidth, rms unweighted v in = 1.00 v rms for vddh = 5 v v in = 1.75 v rms for vddh = 8 v 75 80 85 90 db band frequency response 20 hz to 20 khz -0.5 0.5 db xtalk l/r left/right crosstalk 1.4 v rms @ 1 khz on ref signal, the other one grounded 70 75 db xtalk in1/2 audio crosstalk from input channel 1 to input channel 2 1.4 v rms @ 1 khz on ref signal, all other inputs grounded 80 85 db xtalk out1/2 audio crosstalk from output channel 1 to output channel 2 1.4 v rms @ 1 khz on reference output, signal on a single input, all other inputs grounded 80 85 db symbol parameter test conditions min. typ. max. units clipping thd v in = 1 v rms at 1 khz for vddh = 5 v v in = 2 v rms at 1 khz for vddh = 8 v 0.5 0.2 2.0 2.0 % thd total harmonic distortion v in = 0.90 v rms at 1 khz for vddh = 5 v v in = 1.75 v rms at 1 khz for vddh = 8 v 0.03 0.03 0.05 0.05 % snr signal to noise ratio 20 to 15 khz bandwidth, rms unweighted v in = 0.90 v rms for vddh = 5 v v in = 1.75 v rms for vddh = 8 v 70 70 74 74 db band frequency response 20 hz to 15 khz -0.5 0.5 db symbol parameter test conditions min. typ. max. units r inmonoin mono input resistance 15 22 30 k ? vdc inmonoin mono input dc level 1.45 v thd total harmonic distortion v in = 0.45 v rms at 1 khz 0.03 0.05 % snr signal to noise ratio 20 to 15 khz bandwidth, rms unweighted v in = 0.45 v rms 70 74 db band frequency response 20 hz to 15 khz -0.5 0.5 db symbol parameter test conditions min. typ. max. units r outmain output resistance for main outputs lsl, lsr, sw, hpl and hpr pins 5 30 ? vdc outmain main output dc level 2.20 v symbol parameter test conditions min. typ. max. units obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) electrical characteristics stv82x6 90/97 11.11 i2s to scart path characteristics 11.12 loudspeaker and headphone vo lume control characteristics 11.13 mute performance 11.14 digital i/os thd total harmonic distortion 90% full-scale range at 1 khz 0.025 0.050 % snr signal to noise ratio 20 to 15 khz bandwidth, rmsunweighted, 90% full-scale range 72 76 db v outamp main output amplitude 90% full- scale range at 1 khz 0.800 0.875 0.950 v rms symbol parameter test conditions min. typ. max. units thd total harmonic distortion 90% full-scale range at 1 khz 0.025 0.100 % snr signal to noise ratio 20 hz to 15 khz bandwidth unweighted, 90% full-scale range 72 76 db v outamp main output amplitude 90% full-scale range at 1 khz, vddh = 8v 1.60 1.75 1.90 v rms symbol parameter test conditions min. typ. max. units vol_min maximum attenuation i2s to dac at 1 khz with 1 active channel 82 90 db vol_dnl maximum non-linearity step to step volume control range of 0 db to 72 db 0.1 0.3 db symbol parameter test conditions min. typ. max. units dac mute i2s to dac at 1 khz with 1 active channel 85 95 scart mute 1.4 v rms @ 1 khz on ref signal, all other inputs grounded 78 81 symbol parameter test conditions min. typ. max. units v il low level input voltage 0.5 v v ih high level input voltage 2.0 v i in input current 1 a symbol parameter test conditions min. typ. max. units obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 91/97 stv82x6 electrical characteristics 11.15 i2c bus interface symbol parameter min. typ. max. units scl v il input voltage low level 0 0.7 v v ih input voltage high level 3 v dd v v ol low output voltage (i ol =3ma) 0 0.8 v f scl scl clock frequency 400 khz t r , t f input rise/fall times (10 to 90%) 0.8 s i i(l) input leakage current (v i =5.5v) 10 a c l input capacitance 10 pf sda v il input voltage low level 0 0.7 v v ih input voltage high level 3 v dd v t r , t f input rise/fall times (10 to 90%) 0.8 s i i(l) input leakage current (v i = 5.5 v with output off) 10 a v ol low output voltage (i ol =3ma) 0 0.8 v t fo output fall time between 3 v and 1 v 0.6 s c l load capacitance 400 pf i ack maximum sink current 3ma timing t low low period 1 s t high high period 1 s t su, dat data setup time 250 ns t hd, dat data hold time 250 ns t su, stop stop setup time from clock high 1 s t buf start setup time following a stop 1 s t hd, sta start hold time 1 s t su, sta start setup time following clock low to high transition 1 s obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) electrical characteristics stv82x6 92/97 figure 19: serial bus timing t hd, sta t low t r t buf t high t f t su, dat sda scl sda for start and stop t su, sta t su, sto t hd, dat obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 93/97 stv82x6 package mechanical data 12 package mechanical data figure 20: 56-pin shrink plastic du al in line package, 600-mil width dim. mm inches a 6.35 0.250 a1 0.38 0.015 a2 3.18 4.95 0.125 0.195 b 0.41 0.016 b2 0.89 0.035 c 0.20 0.38 0.008 0.015 d 50.29 53.21 1.980 2.095 e 15.01 0.591 e1 12.32 14.73 0.485 0.580 e 1.78 0.070 ea 15.24 0.600 eb 17.78 0.700 l 2.92 5.08 0.115 0.200 sdip56 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) package mechanical data stv82x6 94/97 figure 21: 80-pin thin plastic quad flat package dim. mm inches min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.22 0.32 0.38 0.009 0.013 0.015 c 0.09 0.20 0.004 0.008 d 16.00 0.630 d1 14.00 0.551 e 16.00 0.630 e1 14.00 0.551 e 0.65 0.026 k 0 3.5 0.75 0 3.5 0.75 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.039 a a2 a1 b e h c l l1 e e1 d1 d obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) 95/97 stv82x6 revision history 13 revision history date revision modification 10 jan 2003 2.0 first release 7 may 2003 2.1 modification to table 6: volume/balance control registers on page 21 . 14 may 2004 2.2 addition of pin 12 (tqfp80) to ta bl e 2 . updated figure 6 . 25 feb 2005 3 modification of ceth (20h) register recommended value. obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) stv82x6 96/97 index a analog power supply ........................................ 29 analog-to-digital conversion ............................. 12 automatic frequency control ............................ 14 automatic gain control ...................................... 12 automatic overmodulation detection ................ 13 automatic standard recognition system 12-13, 33 b balance control ................................................. 20 bass control ...................................................... 19 beeper ............................................................... 22 c clock .................................................................. 16 clock system output ......................................... 28 d digital power supply .......................................... 29 digital stereo output ......................................... 28 h headphone detection mode .............................. 21 i i2c address ....................................................... 31 i2s ..................................................................... 28 independent mute control ................................. 21 input audio matrixing ......................................... 26 l loudness control .............................................. 22 m mute control ...................................................... 21 o output audio matrixing ...................................... 26 p peak detector .................................................... 13 peak level detector .......................................... 26 philips mode ...................................................... 28 power supplies .................................................. 29 s signal to noise ................................................... 88 smart volume control ....................................... 18 sony mode ......................................................... 28 sound if signal ................................................. 12 srs 3d surround .............................................. 23 st wide surround ............................................. 19 stereo flag ........................................................ 27 supply voltages ................................................. 29 t total harmonic distortion .................................. 88 treble control .................................................... 19 v voltage regulator .............................................. 29 volume control .................................................. 20 w word selection polarity ..................................... 28 obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) stv82x6 97/97 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such info rmation nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicat ion are subject to change without notice. this publication supersedes and replaces all information previously supplied. st microelectronics products are not authorized for use as critical components in life support devices or systems wi thout express written approv al of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spai n - sweden - switzerland - united kingdom - united states www.st.com obsolete product(s) - obsolete product(s) obsolete product(s) - obsolete product(s) |
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